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authorGeert Uytterhoeven <geert+renesas@glider.be>2023-10-05 14:21:59 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2023-10-05 14:21:59 +0200
commit75b696a43fdd1740359cf967a6cbc9ae06fb616d (patch)
tree935346030b86845af11f8008916212741ddde024 /tools/perf/scripts/python
parentarm64: dts: renesas: ulcb/kf: Use multi Component sound (diff)
parentclk: tegra: fix error return case for recalc_rate (diff)
downloadlinux-75b696a43fdd1740359cf967a6cbc9ae06fb616d.tar.gz
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Merge tag 'clk-fixes-for-linus' of https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux into renesas-dts-for-v6.7
Adding versa3 clock generator nodes to DTS depends on the fixed clock index handling: - Fix the binding for versaclock3 that was introduced this merge window so we know what the values are for clk consumers
Diffstat (limited to 'tools/perf/scripts/python')
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