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| author | Weihang Li <liweihang@huawei.com> | 2021-06-21 16:00:35 +0800 |
|---|---|---|
| committer | Jason Gunthorpe <jgg@nvidia.com> | 2021-06-21 15:03:40 -0300 |
| commit | 78c1da52704853bcc57399ca76b5b6e9e08ca627 (patch) | |
| tree | 3b36c4bcfbc45902b1d64b6294927bf5584848cb /tools/perf/scripts/python | |
| parent | RDMA/mlx5: Enable Relaxed Ordering by default for kernel ULPs (diff) | |
| download | linux-78c1da52704853bcc57399ca76b5b6e9e08ca627.tar.gz linux-78c1da52704853bcc57399ca76b5b6e9e08ca627.zip | |
RDMA/hns: Do not use !! for values that are already bool when calling hr_reg_write()
There is no need to use "!!" before "eq->eqe_size ==
HNS_ROCE_V3_EQE_SIZE", or sparse will complain about "dubious: x & !y".
Fixes: 782832f25404 ("RDMA/hns: Simplify the function config_eqc()")
Link: https://lore.kernel.org/r/1624262443-24528-2-git-send-email-liweihang@huawei.com
Signed-off-by: Weihang Li <liweihang@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions