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authorVladimir Oltean <vladimir.oltean@nxp.com>2020-03-19 23:16:48 +0200
committerDavid S. Miller <davem@davemloft.net>2020-03-23 20:52:27 -0700
commit7b005a1742be4608480d9d151aec42170a06cbee (patch)
treead1fc3c639ee965ba6ebc6117fc73152e5b8b5a5 /tools/perf/scripts/python
parentnet: phy: mscc: accept all RGMII species in vsc85xx_mac_if_set (diff)
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net: phy: mscc: configure both RX and TX internal delays for RGMII
The driver appears to be secretly enabling the RX clock skew irrespective of PHY interface type, which is generally considered a big no-no. Make them configurable instead, and add TX internal delays when necessary too. While at it, configure a more canonical clock skew of 2.0 nanoseconds than the current default of 1.1 ns. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python')
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