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| author | José Roberto de Souza <jose.souza@intel.com> | 2021-10-28 16:04:49 -0700 |
|---|---|---|
| committer | José Roberto de Souza <jose.souza@intel.com> | 2021-10-29 12:58:50 -0700 |
| commit | 9556829ce4d0618ae4295af8e4b3dd7e38f43598 (patch) | |
| tree | 519870015b277643837b3c29a06a4d3d833d4d38 /tools/perf/scripts/python | |
| parent | Revert "drm/i915/display/psr: Do full fetch when handling multi-planar formats" (diff) | |
| download | linux-9556829ce4d0618ae4295af8e4b3dd7e38f43598.tar.gz linux-9556829ce4d0618ae4295af8e4b3dd7e38f43598.zip | |
drm/i915/adlp: Implement workaround 16013190616
New workaround added to specification, requiring bit 15 of
GEN8_CHICKEN_DCPR_1 to be programed before power well 1 is enabled.
BSpec: 54369
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211028230449.115832-1-jose.souza@intel.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions