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| author | Marc Zyngier <marc.zyngier@arm.com> | 2015-09-30 11:50:04 +0100 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2015-10-09 22:16:54 +0100 |
| commit | 963fcd40958711cecf9e9a1a8525f88b782d6a98 (patch) | |
| tree | f4e6c437796fc63d7f5204baccd91dbb3af5c1b5 /tools/perf/scripts/python | |
| parent | irqchip/gic-v3: Make gic_enable_sre an inline function (diff) | |
| download | linux-963fcd40958711cecf9e9a1a8525f88b782d6a98.tar.gz linux-963fcd40958711cecf9e9a1a8525f88b782d6a98.zip | |
arm64: cpufeatures: Check ICC_EL1_SRE.SRE before enabling ARM64_HAS_SYSREG_GIC_CPUIF
As the firmware (or the hypervisor) may have disabled SRE access,
check that SRE can actually be enabled before declaring that we
do have that capability.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions