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| author | Josua Mayer <josua@solid-run.com> | 2024-05-04 13:35:54 +0200 |
|---|---|---|
| committer | Vignesh Raghavendra <vigneshr@ti.com> | 2024-06-12 21:31:27 +0530 |
| commit | 9dcc0e1065f3c40d0b2ad79a858bb4ebaba33167 (patch) | |
| tree | f2ba91d22737c6e761db8ca6265849588bb0eaff /tools/perf/scripts/python | |
| parent | arm64: dts: ti: phycore-am64: Add PMIC (diff) | |
| download | linux-9dcc0e1065f3c40d0b2ad79a858bb4ebaba33167.tar.gz linux-9dcc0e1065f3c40d0b2ad79a858bb4ebaba33167.zip | |
arm64: dts: ti: k3-am642-hummingboard-t: correct rs485 rts polarity
The RS485 transceiver RE (Receiver enable) and DE (Driver enable) are
shorted and connected to both RTS/CTS of the SoC UART.
RE is active-low, DE is active-high.
Remove the "rs485-rts-active-low" flag to match RTS polarity with DE,
and fix communication in both transmit and receive directions.
Fixes: d60483faf914 ("arm64: dts: add description for solidrun am642 som and evaluation board")
Signed-off-by: Josua Mayer <josua@solid-run.com>
Link: https://lore.kernel.org/r/20240504-ti-rs485-rts-v1-1-e88ef1c96f34@solid-run.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions