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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-10-25 13:35:13 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-12-04 14:58:51 +0000 |
| commit | 9e95922b1016ac941db7edcf6b6088b3c2e916c8 (patch) | |
| tree | 1b60b7231f9412e7c842c9a12804b3ab914ca5cd /tools/perf/scripts/python | |
| parent | ARM: 5794/1: Flush the D-cache during copy_user_highpage() (diff) | |
| download | linux-9e95922b1016ac941db7edcf6b6088b3c2e916c8.tar.gz linux-9e95922b1016ac941db7edcf6b6088b3c2e916c8.zip | |
ARM: I-cache: Add invalidation for VIVT ASID tagged caches
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions