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| author | Xiang Chen <chenxiang66@hisilicon.com> | 2017-06-14 23:33:25 +0800 |
|---|---|---|
| committer | Martin K. Petersen <martin.petersen@oracle.com> | 2017-06-19 21:31:26 -0400 |
| commit | a2204723acefd504561b5dbc53d9c0a1c2528eab (patch) | |
| tree | 0bb7b58b32adec2f35c87a39f71733cf5c244d8d /tools/perf/scripts/python | |
| parent | scsi: hisi_sas: add v3 cq interrupt handler (diff) | |
| download | linux-a2204723acefd504561b5dbc53d9c0a1c2528eab.tar.gz linux-a2204723acefd504561b5dbc53d9c0a1c2528eab.zip | |
scsi: hisi_sas: add v3 code to send SSP frame
Add code to prepare SSP frame and deliver it to hardware.
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions