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| author | Jiri Pirko <jiri@mellanox.com> | 2019-10-31 11:42:07 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2019-10-31 10:54:46 -0700 |
| commit | a513b1a5910bfc15d5a42e969e66a7986fd32819 (patch) | |
| tree | 505fa4d74b9383e9cfc3bf2a7aafa655e91da613 /tools/perf/scripts/python | |
| parent | mlxsw: reg: Extend PMLP tx/rx lane value size to 4 bits (diff) | |
| download | linux-a513b1a5910bfc15d5a42e969e66a7986fd32819.tar.gz linux-a513b1a5910bfc15d5a42e969e66a7986fd32819.zip | |
mlxsw: reg: Add Port Module Type Mapping Register
The PMTM allows query or configuration of module types.
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Reviewed-by: Shalom Toledo <shalomt@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions