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authorCezary Rojewski <cezary.rojewski@intel.com>2025-04-07 13:23:47 +0200
committerMark Brown <broonie@kernel.org>2025-04-07 14:39:59 +0100
commitaf1c968d25c7c44cd2738349c479f8b610a3fc40 (patch)
treec8a46f792ec88bce1f3514672eb43efeb5619637 /tools/perf/scripts/python
parentASoC: Intel: avs: Relocate DSP status registers (diff)
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ASoC: Intel: avs: PTL-based platforms support
Define handlers specific to ACE platforms, that Frisco Lake (FCL), a PantherLake (PTL)-based platform, is founded upon. Most operations are still inherited from their predecessors with the major difference being AudioDSP cores management - replaced by DSP-domain power management. Software has to ensure the DSP domain is both powered on and its power-gating disabled before it can be utilized for streaming. Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Acked-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Link: https://patch.msgid.link/20250407112352.3720779-6-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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