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| author | James Clark <james.clark@linaro.org> | 2025-11-28 11:55:21 +0000 |
|---|---|---|
| committer | Suzuki K Poulose <suzuki.poulose@arm.com> | 2025-12-22 15:30:54 +0000 |
| commit | afed86e6e141faa2c7433517c9d91ab4d7d9d443 (patch) | |
| tree | 960734bb131a19a0b6ed176a83cb109cfeb213a4 /tools/perf/scripts/python | |
| parent | b945d3677754dc1031515d9cd1604d0b61bb9fa2 (diff) | |
| download | linux-afed86e6e141faa2c7433517c9d91ab4d7d9d443.tar.gz linux-afed86e6e141faa2c7433517c9d91ab4d7d9d443.zip | |
coresight: Interpret ETMv4 config with ATTR_CFG_GET_FLD()
Remove hard coded bitfield extractions and shifts and replace with
ATTR_CFG_GET_FLD().
ETM4_CFG_BIT_BB was defined to give the register bit positions to
userspace, TRCCONFIGR_BB should be used in the kernel so replace it.
Reviewed-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Tested-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: James Clark <james.clark@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20251128-james-cs-syncfreq-v8-9-4d319764cc58@linaro.org
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions