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| author | Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> | 2015-01-08 15:25:07 +0900 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2015-01-08 20:06:54 -0800 |
| commit | b284fbe3b3ef9cf8e03d90b576d17fe646312d6f (patch) | |
| tree | 205daa34a9d9b98389a24a805396241ddcdb9f5e /tools/perf/scripts/python | |
| parent | sh-eth: Set fdr_value of R-Car SoCs (diff) | |
| download | linux-b284fbe3b3ef9cf8e03d90b576d17fe646312d6f.tar.gz linux-b284fbe3b3ef9cf8e03d90b576d17fe646312d6f.zip | |
sh_eth: Fix access to TRSCER register
TRSCER register is configured differently by SoCs. TRSCER of R-Car Gen2 is
RINT8 bit only valid, other bits are reserved bits. This removes access to
TRSCER register reserve bit by adding variable trscer_err_mask to
sh_eth_cpu_data structure, set the register information to each SoCs.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions