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| author | Daehwan Jung <dh10.jung@samsung.com> | 2024-06-10 20:39:11 +0900 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-06-20 19:30:30 +0200 |
| commit | b7ec7fd63256ff39eb95e27546efbd16b3915bf4 (patch) | |
| tree | f022d8720372de28a3f00bf3b3f6fa7f645869e0 /tools/perf/scripts/python | |
| parent | usb: typec: tipd: use min() to set tps6598x firmware packet size (diff) | |
| download | linux-b7ec7fd63256ff39eb95e27546efbd16b3915bf4.tar.gz linux-b7ec7fd63256ff39eb95e27546efbd16b3915bf4.zip | |
usb: dwc3: Support quirk for writing high-low order
There's the limitation of Synopsys dwc3 controller with ERST programming in
supporting separate ERSTBA_HI and ERSTBA_LO programming. It's supported when
the ERSTBA is programmed ERSTBA_HI before ERSTBA_LO. But, writing operations
in xHCI is done low-high order following xHCI spec. xHCI specification 5.1
"Register Conventions" states that 64 bit registers should be written in
low-high order. Synopsys dwc3 needs workaround for high-low order. That's why
adding new quirk is needed to support this.
Signed-off-by: Daehwan Jung <dh10.jung@samsung.com>
Link: https://lore.kernel.org/r/1718019553-111939-2-git-send-email-dh10.jung@samsung.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions