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| author | Matt Roper <matthew.d.roper@intel.com> | 2019-12-23 17:20:25 -0800 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2019-12-27 10:46:19 -0800 |
| commit | b9cf9dac3dac4c1d2a47d34f30ec53c0423cecf8 (patch) | |
| tree | e12aa5ae1507248da5dab0b9265d6cc96947520a /tools/perf/scripts/python | |
| parent | drm/i915: Extend WaDisableDARBFClkGating to icl,ehl,tgl (diff) | |
| download | linux-b9cf9dac3dac4c1d2a47d34f30ec53c0423cecf8.tar.gz linux-b9cf9dac3dac4c1d2a47d34f30ec53c0423cecf8.zip | |
drm/i915: Add Wa_1408615072 and Wa_1407596294 to icl,ehl
Workaround database indicates we should disable clock gating of both the
vsunit and hsunit.
Bspec: 33450
Bspec: 33451
Cc: stable@kernel.vger.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191224012026.3157766-3-matthew.d.roper@intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions