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| author | Sai Prakash Ranjan <quic_saipraka@quicinc.com> | 2022-01-28 13:17:11 +0530 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-02-10 18:29:33 -0600 |
| commit | bc88a42075cd85cedfcea5fbd75817e57e091b88 (patch) | |
| tree | 2f0a2530fac4ec755af9da905368fb3b1b84b403 /tools/perf/scripts/python | |
| parent | soc: qcom: llcc: Add write-cache cacheable support (diff) | |
| download | linux-bc88a42075cd85cedfcea5fbd75817e57e091b88.tar.gz linux-bc88a42075cd85cedfcea5fbd75817e57e091b88.zip | |
soc: qcom: llcc: Add missing llcc configuration data
Add missing llcc configuration data for few chipsets which
were not added during initial post.
Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/143d11bacaca086406fdd10fc32f91eccd943527.1643355594.git.quic_saipraka@quicinc.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions