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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-11-13 21:17:37 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-11-13 21:17:37 +0100 |
| commit | c23be4242bed1009ff57aaa4578abe638696e5de (patch) | |
| tree | f53f0a977844d8c010c3a8990d4a88559dd457d4 /tools/perf/scripts/python | |
| parent | clk: renesas: r9a09g047: Add RSCI clocks/resets (diff) | |
| parent | dt-bindings: clock: renesas,r9a09g056-cpg: Add USB3.0 core clocks (diff) | |
| download | linux-c23be4242bed1009ff57aaa4578abe638696e5de.tar.gz linux-c23be4242bed1009ff57aaa4578abe638696e5de.zip | |
Merge tag 'renesas-r9a09g057-dt-binding-defs-tag5' into renesas-clk-for-v6.19
Renesas RZ/V2N and RZ/V2H USB3.0 Core Clock DT Binding Definitions
USB3.0 core clock DT binding definitions for the Renesas RZ/V2N
(R9A09G056) and RZ/V2H (R9A09G057) SoCs, shared by driver and DT source
files.
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions