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| author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2013-02-15 07:21:08 -0300 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2013-02-21 11:06:37 -0300 |
| commit | c66b5a79a9348ccd6d1cd81416027d0e12da965d (patch) | |
| tree | c6a25cbd329ebb6cd7edadb9bcd5f94796d94e97 /tools/perf/scripts/python | |
| parent | edac: initialize the core earlier (diff) | |
| download | linux-c66b5a79a9348ccd6d1cd81416027d0e12da965d.tar.gz linux-c66b5a79a9348ccd6d1cd81416027d0e12da965d.zip | |
edac: add a new memory layer type
There are some cases where the memory controller layout is
completely hidden. This is the case of firmware-driven error
code, like the one provided by GHES. Add a new layer to be
used on such memory error report mechanisms.
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions