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| author | Arnd Bergmann <arnd@arndb.de> | 2025-01-16 15:30:27 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2025-01-16 15:30:27 +0100 |
| commit | d1181e342bff46837d93ca6534e0c8117856d92d (patch) | |
| tree | a13d0679b26f2c5b2dcf664f7b89c9bf90fbd571 /tools/perf/scripts/python | |
| parent | Merge tag 'v6.14-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/ke... (diff) | |
| parent | ARM: dts: qcom: sdx55: Disable USB U1/U2 entry (diff) | |
| download | linux-d1181e342bff46837d93ca6534e0c8117856d92d.tar.gz linux-d1181e342bff46837d93ca6534e0c8117856d92d.zip | |
Merge tag 'qcom-arm32-for-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm32 DeviceTree updates for v6.14
Describe the interconnect paths for PCIe EP controllers on SDX55 and
SDX65. Disable USB U1/U2 entry to improve USB stability on the same.
* tag 'qcom-arm32-for-6.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: sdx55: Disable USB U1/U2 entry
ARM: dts: qcom: sdx65: Disable USB U1/U2 entry
ARM: dts: qcom: sdx55: Add CPU PCIe EP interconnect path
ARM: dts: qcom: sdx65: Add PCIe EP interconnect path
Link: https://lore.kernel.org/r/20250111171126.369502-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions