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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2022-05-08 18:57:01 +0100
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2022-06-14 11:53:19 +0100
commitda803652534271dbb4af0802bd678c759e27e6de (patch)
tree050f364de20f126ff480ab67a5c510d1fc21e3d8 /tools/perf/scripts/python
parentiio: potentiometer: ad5110: Fix alignment for DMA safety (diff)
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iio: potentiometer: ad5272: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 79e8a32d2aa9 ("iio: ad5272: Add support for Analog Devices digital potentiometers") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Phil Reid <preid@electromag.com.au> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-82-jic23@kernel.org
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