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authorGustavo Sousa <gustavo.sousa@intel.com>2025-12-01 17:23:02 -0800
committerMatt Roper <matthew.d.roper@intel.com>2025-12-02 10:08:08 -0800
commitdf9670191613cdea0e223f5070368a26312b12c3 (patch)
treedce9ba5f747f649bce86f8550ba9e6d4117b3920 /tools/perf/scripts/python
parentdf5dd52a6de486e32576ac5851b4e9429182274b (diff)
downloadlinux-df9670191613cdea0e223f5070368a26312b12c3.tar.gz
linux-df9670191613cdea0e223f5070368a26312b12c3.zip
drm/i915/xe3p_lpd: Handle underrun debug bits
Xe3p_LPD added several bits containing information that can be relevant to debugging FIFO underruns. Add the logic necessary to handle them when reporting underruns. This was adapted from the initial patch[1] from Sai Teja Pottumuttu. [1] https://lore.kernel.org/all/20251015-xe3p_lpd-basic-enabling-v1-12-d2d1e26520aa@intel.com/ v2: - Handle FBC-related bits in intel_fbc.c. (Ville) - Do not use intel_fbc_id_for_pipe (promoted from skl_fbc_id_for_pipe), but use pipe's primary plane to get the FBC instance. (Ville, Matt) - Improve code readability by moving logic specific to logging fields of UNDERRUN_DBG1 to a separate function. (Jani) v3: - Use crtc->base.primary instead of cycling through all crtcs Bspec: 69111, 69561, 74411, 74412 Cc: Jani Nikula <jani.nikula@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com> Link: https://patch.msgid.link/20251202012306.9315-5-matthew.s.atwood@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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