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| author | George Shen <George.Shen@amd.com> | 2021-11-19 11:09:37 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-12-01 16:06:44 -0500 |
| commit | ee347d5b40a14dd9a80dfb2bf4d2c5b3b4367135 (patch) | |
| tree | be589c257ff7e2ad795e623cb5e03a8f008b480d /tools/perf/scripts/python | |
| parent | drm/amd/display: Add force detile buffer size debug flag (diff) | |
| download | linux-ee347d5b40a14dd9a80dfb2bf4d2c5b3b4367135.tar.gz linux-ee347d5b40a14dd9a80dfb2bf4d2c5b3b4367135.zip | |
drm/amd/display: Add 16ms AUX RD interval W/A for specific LTTPR
[Why]
Certain display configurations require an extra delay before
reading lane status with certain LTTPR.
[How]
Add temporary workaround to force AUX RD interval to
16ms for CR and EQ. Needs to be refactored later.
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: George Shen <George.Shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions