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| author | Ben Widawsky <ben@bwidawsk.net> | 2013-04-08 18:43:47 -0700 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-04-18 09:43:11 +0200 |
| commit | a93e41618ecf69a2ced005a13377d7903da4dd62 (patch) | |
| tree | 6d876e3c5e6831b2b4ec23c3e30782dfb7648e6b /tools/perf/scripts | |
| parent | drm/i915: Use MLC (l3$) for context objects (diff) | |
| download | linux-a93e41618ecf69a2ced005a13377d7903da4dd62.tar.gz linux-a93e41618ecf69a2ced005a13377d7903da4dd62.zip | |
drm/i915: generalize pte vs. register BAR allocation
All gen6+ parts so far have 1 BAR which holds both the register space
and the GTT PTEs. Up until now, that was a 4MB BAR with half allocated
to each.
I have a strong hunch (wink, nod, wink) that future gens will also keep
a similar 50-50 split though the sizes may change. To help this along
change the code to obey the rule of half the total size instead of a
hard-coded 2MB.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts')
0 files changed, 0 insertions, 0 deletions