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-rw-r--r--Documentation/gpu/nova/core/todo.rst163
1 files changed, 14 insertions, 149 deletions
diff --git a/Documentation/gpu/nova/core/todo.rst b/Documentation/gpu/nova/core/todo.rst
index 0972cb905f7a..d5130b2b08fb 100644
--- a/Documentation/gpu/nova/core/todo.rst
+++ b/Documentation/gpu/nova/core/todo.rst
@@ -41,103 +41,15 @@ trait [1] from the num crate.
Having this generalization also helps with implementing a generic macro that
automatically generates the corresponding mappings between a value and a number.
-| Complexity: Beginner
-| Link: https://docs.rs/num/latest/num/trait.FromPrimitive.html
-
-Conversion from byte slices for types implementing FromBytes [TRSM]
--------------------------------------------------------------------
-
-We retrieve several structures from byte streams coming from the BIOS or loaded
-firmware. At the moment converting the bytes slice into the proper type require
-an inelegant `unsafe` operation; this will go away once `FromBytes` implements
-a proper `from_bytes` method.
+FromPrimitive support has been worked on in the past, but hasn't been followed
+since then [1].
-| Complexity: Beginner
-
-CoherentAllocation improvements [COHA]
---------------------------------------
-
-`CoherentAllocation` needs a safe way to write into the allocation, and to
-obtain slices within the allocation.
+There also have been considerations of ToPrimitive [2].
| Complexity: Beginner
-| Contact: Abdiel Janulgue
-
-Generic register abstraction [REGA]
------------------------------------
-
-Work out how register constants and structures can be automatically generated
-through generalized macros.
-
-Example:
-
-.. code-block:: rust
-
- register!(BOOT0, 0x0, u32, pci::Bar<SIZE>, Fields [
- MINOR_REVISION(3:0, RO),
- MAJOR_REVISION(7:4, RO),
- REVISION(7:0, RO), // Virtual register combining major and minor rev.
- ])
-
-This could expand to something like:
-
-.. code-block:: rust
-
- const BOOT0_OFFSET: usize = 0x00000000;
- const BOOT0_MINOR_REVISION_SHIFT: u8 = 0;
- const BOOT0_MINOR_REVISION_MASK: u32 = 0x0000000f;
- const BOOT0_MAJOR_REVISION_SHIFT: u8 = 4;
- const BOOT0_MAJOR_REVISION_MASK: u32 = 0x000000f0;
- const BOOT0_REVISION_SHIFT: u8 = BOOT0_MINOR_REVISION_SHIFT;
- const BOOT0_REVISION_MASK: u32 = BOOT0_MINOR_REVISION_MASK | BOOT0_MAJOR_REVISION_MASK;
-
- struct Boot0(u32);
-
- impl Boot0 {
- #[inline]
- fn read(bar: &RevocableGuard<'_, pci::Bar<SIZE>>) -> Self {
- Self(bar.readl(BOOT0_OFFSET))
- }
-
- #[inline]
- fn minor_revision(&self) -> u32 {
- (self.0 & BOOT0_MINOR_REVISION_MASK) >> BOOT0_MINOR_REVISION_SHIFT
- }
-
- #[inline]
- fn major_revision(&self) -> u32 {
- (self.0 & BOOT0_MAJOR_REVISION_MASK) >> BOOT0_MAJOR_REVISION_SHIFT
- }
-
- #[inline]
- fn revision(&self) -> u32 {
- (self.0 & BOOT0_REVISION_MASK) >> BOOT0_REVISION_SHIFT
- }
- }
-
-Usage:
-
-.. code-block:: rust
-
- let bar = bar.try_access().ok_or(ENXIO)?;
-
- let boot0 = Boot0::read(&bar);
- pr_info!("Revision: {}\n", boot0.revision());
-
-A work-in-progress implementation currently resides in
-`drivers/gpu/nova-core/regs/macros.rs` and is used in nova-core. It would be
-nice to improve it (possibly using proc macros) and move it to the `kernel`
-crate so it can be used by other components as well.
-
-Features desired before this happens:
-
-* Make I/O optional I/O (for field values that are not registers),
-* Support other sizes than `u32`,
-* Allow visibility control for registers and individual fields,
-* Use Rust slice syntax to express fields ranges.
-
-| Complexity: Advanced
-| Contact: Alexandre Courbot
+| Link: https://docs.rs/num/latest/num/trait.FromPrimitive.html
+| Link: https://lore.kernel.org/all/cover.1750689857.git.y.j3ms.n@gmail.com/ [1]
+| Link: https://rust-for-linux.zulipchat.com/#narrow/channel/288089-General/topic/Implement.20.60FromPrimitive.60.20trait.20.2B.20derive.20macro.20for.20nova-core/with/541971854 [2]
Numerical operations [NUMM]
---------------------------
@@ -153,32 +65,6 @@ A `num` core kernel module is being designed to provide these operations.
| Complexity: Intermediate
| Contact: Alexandre Courbot
-Delay / Sleep abstractions [DLAY]
----------------------------------
-
-Rust abstractions for the kernel's delay() and sleep() functions.
-
-FUJITA Tomonori plans to work on abstractions for read_poll_timeout_atomic()
-(and friends) [1].
-
-| Complexity: Beginner
-| Link: https://lore.kernel.org/netdev/20250228.080550.354359820929821928.fujita.tomonori@gmail.com/ [1]
-
-IRQ abstractions
-----------------
-
-Rust abstractions for IRQ handling.
-
-There is active ongoing work from Daniel Almeida [1] for the "core" abstractions
-to request IRQs.
-
-Besides optional review and testing work, the required ``pci::Device`` code
-around those core abstractions needs to be worked out.
-
-| Complexity: Intermediate
-| Link: https://lore.kernel.org/lkml/20250122163932.46697-1-daniel.almeida@collabora.com/ [1]
-| Contact: Daniel Almeida
-
Page abstraction for foreign pages
----------------------------------
@@ -191,40 +77,16 @@ There is active onging work from Abdiel Janulgue [1] and Lina [2].
| Link: https://lore.kernel.org/linux-mm/20241119112408.779243-1-abdiel.janulgue@gmail.com/ [1]
| Link: https://lore.kernel.org/rust-for-linux/20250202-rust-page-v1-0-e3170d7fe55e@asahilina.net/ [2]
-Scatterlist / sg_table abstractions
------------------------------------
-
-Rust abstractions for scatterlist / sg_table.
-
-There is preceding work from Abdiel Janulgue, which hasn't made it to the
-mailing list yet.
-
-| Complexity: Intermediate
-| Contact: Abdiel Janulgue
-
PCI MISC APIs
-------------
-Extend the existing PCI device / driver abstractions by SR-IOV, config space,
-capability, MSI API abstractions.
-
-| Complexity: Beginner
-
-XArray bindings [XARR]
-----------------------
+Extend the existing PCI device / driver abstractions by SR-IOV, capability, MSI
+API abstractions.
-We need bindings for `xa_alloc`/`xa_alloc_cyclic` in order to generate the
-auxiliary device IDs.
+SR-IOV [1] is work in progress.
-| Complexity: Intermediate
-
-Debugfs abstractions
---------------------
-
-Rust abstraction for debugfs APIs.
-
-| Reference: Export GSP log buffers
-| Complexity: Intermediate
+| Complexity: Beginner
+| Link: https://lore.kernel.org/all/20251119-rust-pci-sriov-v1-0-883a94599a97@redhat.com/ [1]
GPU (general)
=============
@@ -263,7 +125,10 @@ Some possible options:
- maple_tree
- native Rust collections
+There is work in progress for using drm_buddy [1].
+
| Complexity: Advanced
+| Link: https://lore.kernel.org/all/20251219203805.1246586-4-joelagnelf@nvidia.com/ [1]
Instance Memory
---------------