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rt.c?id=18662a1d8f35ef6b1758578ad884e37746c753c8&follow=1'>tty: serial: mpc52xx_uart: make rx/tx hooks return unsignedJiri Slaby1-11/+11 All these return bitmasks, so it makes more sense to return unsigned -- this is what a reader and also all the callers expect. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Link: https://lore.kernel.org/r/20220224111028.20917-2-jslaby@suse.cz Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2022-02-25serial: 8250_lpss: Balance reference count for PCI DMA deviceAndy Shevchenko1-6/+22 The pci_get_slot() increases its reference count, the caller must decrement the reference count by calling pci_dev_put(). Fixes: 9a1870ce812e ("serial: 8250: don't use slave_id of dma_slave_config") Depends-on: a13e19cf3dc1 ("serial: 8250_lpss: split LPSS driver to separate module") Reported-by: Qing Wang <wangqing@vivo.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220223151240.70248-1-andriy.shevchenko@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2022-02-25serial: 8250_mid: Balance reference count for PCI DMA deviceAndy Shevchenko1-4/+15 The pci_get_slot() increases its reference count, the caller must decrement the reference count by calling pci_dev_put(). Fixes: 90b9aacf912a ("serial: 8250_pci: add Intel Tangier support") Fixes: f549e94effa1 ("serial: 8250_pci: add Intel Penwell ports") Reported-by: Qing Wang <wangqing@vivo.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Depends-on: d9eda9bab237 ("serial: 8250_pci: Intel MID UART support to its own driver") Link: https://lore.kernel.org/r/20220215100920.41984-1-andriy.shevchenko@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2022-02-25serial: 8250_aspeed_vuart: replace snprintf with sysfs_emitYang Guang1-3/+3 coccinelle report: ./drivers/tty/serial/8250/8250_aspeed_vuart.c:85:8-16: WARNING: use scnprintf or sprintf ./drivers/tty/serial/8250/8250_aspeed_vuart.c:174:8-16: WARNING: use scnprintf or sprintf ./drivers/tty/serial/8250/8250_aspeed_vuart.c:127:8-16: WARNING: use scnprintf or sprintf Use sysfs_emit instead of scnprintf or sprintf makes more sense. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Yang Guang <yang.guang5@zte.com.cn> Signed-off-by: David Yang <davidcomponentone@gmail.com> Link: https://lore.kernel.org/r/fed40753603dac4d14b17970c88e6f5f936348c1.1644541843.git.yang.guang5@zte.com.cn Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2022-02-25serial: 8250: Correct Kconfig help text for blacklisted PCI devicesMaciej W. Rozycki1-7/+9 Correct the Kconfig help text for SERIAL_8250_LPSS, SERIAL_8250_MID and SERIAL_8250_PERICOM configuration options for dedicated PCI UART drivers that have been blacklisted in the generic PCI 8250 UART driver and as from commit a13e19cf3dc10 ("serial: 8250_lpss: split LPSS driver to separate module"), commit d9eda9bab2372 ("serial: 8250_pci: Intel MID UART support to its own driver"), and commit fcfd3c09f4078 ("serial: 8250_pci: Split out Pericom driver") respectively are not handled by said driver anymore (rather than for extra features only, as the current text indicates), and therefore require the respective dedicated drivers to work at all. Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk> Link: https://lore.kernel.org/r/alpine.DEB.2.21.2202121704560.34636@angie.orcam.me.uk Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2022-02-25arm64: dts: marvell: armada-37xx: add device node for UART clock and use itPali Rohár1-2/+12 Define DT node for UART clock "marvell,armada-3700-uart-clock" and use this UART clock as a base clock for all UART devices. Reviewed-by: Marek Behún <kabel@kernel.org> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Link: https://lore.kernel.org/r/20220219152818.4319-7-kabel@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2022-02-25serial: mvebu-uart: implement support for baudrates higher than 230400 BdPali Rohár1-18/+65 Implement simple usage of fractional divisor. When main divisor D is too large to represent requested baudrate then use divisor M from the fractional divisor feature. All the M prescalers are set to the same and maximal value 63, so the fractional part of the fractional divisor is not used at all. We also determine upper limit for possible baudrates. Experiments show that UART at baudrate 1500000 Bd with this configuration is stable. So there is no need to implement complicated calculation of fractional coefficients yet. To use this feature with higher baudrates, it is required to use UART clock provided by UART clock driver. Default boot xtal clock is not capable of higher baudrates. Reviewed-by: Marek Behún <kabel@kernel.org> Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Link: https://lore.kernel.org/r/20220219152818.4319-6-kabel@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2022-02-25dt-bindings: mvebu-uart: update information about UART clockPali Rohár1-3/+6 Device "marvell,armada-3700-uart" should use "marvell,armada-3700-uart-clock" compatible clock. Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Marek Behún <kabel@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Link: https://lore.kernel.org/r/20220219152818.4319-5-kabel@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2022-02-25serial: mvebu-uart: implement UART clock driver for configuring UART base clockPali Rohár2-2/+520 Implement a new device driver for controlling UART clocks on Marvell Armada 3700 SoC. This device driver is loaded for devices which match the compatible string "marvell,armada-3700-uart-clock". There are more pitfalls related to UART clocks: - both UARTs use same parent clock source (which can be xtal or one of the TBG clocks), - if a TBG clock is used as the parent clock, there are two additional divisors that can both be configured to divide the rate by 1, 2, ... 6, but these divisors are again shared between the two UART controllers on the SOC, - the configuration of the parent clock source and divisors is done in the address space of the first UART controller, UART1. Clocks can be gated separately for UART1 and UART2, but this setting also lives in the address space of UART1, - Marvell's Functional Specification for Armada 3720 document has the clock gating bits swapped, so the one described to gate UART1 clock actually gates UART2 and vice versa, - each UART has it's own "special divisor", and this uses the parent clock described above. These divisors are configure in each UART's address space separately. Thus the driver for UART2 controller needs to have access to UART1 address space, since UART1 address space contains some bits exclusive for UART2 and also some bits which are shared between UART1 and UART2. Also, during boot, when early console is active on one of the UARTs, and we want to switch parent clock from xtal (default) to TBG (to be more flexible with baudrates), the driver changing UART clocks also needs to be able to change the "special divisor", so that the baudrate of earlycon is not changed when swtiching to normal console. Thus the clock driver also needs to be able to access UART2 register space, for UART2's "special divisor". For these reasons, this new UART clock driver does not use ioremap_resource(), but only ioremap() to prevent resource conflicts between UART clock driver and UART driver. We need to share only two 32-bit registers between the UART driver and the UART clock driver: - UART Clock Control - UART 2 Baud Rate Divisor Access to these two registers are protected by one spinlock to prevent any conflicts. Access is required only during probing, when changing baudrate or during suspend/resume. Hardware can be configured to use one of following clocks as UART parent clock: TBG-A-P, TBG-B-P, TBG-A-S, TBG-B-S, xtal. Not every clock is usable for higher buadrates. Any subset can be specified in the device-tree and the driver will choose the best one which also still supports the mandatory baudrate of 9600 Bd. For smooth boot log output it is needed to specify clock used by early console, otherwise garbage would be printed on UART during probe of UART clock driver and transitioning from early console to normal console. We are implementing this to be able to configure TBG clock as UART parent clock, which is required to be able to achieve higher baudrates than 230400 Bd. We achieve this by referencing this new UART clock device node in UART's device node. UART clock device driver automatically chooses the best clock source for UART driver. Until now, UART's device-tree node needed to reference one of the static clocks (xtal or one of the TBGs) as parent clock in the `clocks` phandle - the parent clock which was configured before booting the kernel. If bootloader changed UART's parent clock, it needed to change the `clocks` phandle in DTB correspondingly before booting. From now on both the old mechanism (xtal or TBG referenced as parent clock in `clocks` phandle) and the new one (UART clock referenced in the `clocks` phandle) are supported, to provide full backward compatibility with existing DTS files, full backward compatibility with existing boot loaders, and to provide new features (runtime clock configuration to allow higher baudrates than 230400 Bd). New features are available only with new DTS files. There was also a discussion about how the UART node and the clock-controller node could be wrapped together in a new binding [1, 2]. As explained there, this is not possible if we want to keep backwards compatibility with existing bootloaders, and thus we are doing this by putting the UART clock-controller node inside the UART1 node. [1] https://lore.kernel.org/linux-serial/20220120000651.in7s6nazif5qjkme@pali/ [2] https://lore.kernel.org/linux-serial/20220125204006.A6D09C340E0@smtp.kernel.org/ Reviewed-by: Marek Behún <kabel@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Link: https://lore.kernel.org/r/20220219152818.4319-4-kabel@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>