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2025-10-22dt-bindings: serial: sh-sci: Fix r8a78000 interruptsGeert Uytterhoeven1-0/+1
The SCIF instances on R-Car Gen5 have a single interrupt, just like on other R-Car SoCs. Fixes: 6ac1d60473727931 ("dt-bindings: serial: sh-sci: Document r8a78000 bindings") Cc: stable <stable@kernel.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/09bc9881b31bdb948ce8b69a2b5acf633f5505a4.1759920441.git.geert+renesas@glider.be Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-10-04Merge tag 'tty-6.18-rc1' of ↵Linus Torvalds1-0/+16
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty Pull tty/serial updates from Greg KH: "Here are some small updates for tty/serial drivers for 6.18-rc1. Not many changes overall, just the usual: - abi cleanups and reworking of the tty functions by Jiri by adding console lock guard logic - 8250_platform driver updates - qcom-geni driver updates - other minor serial driver updates - some more vt escape codes added All of these have been in linux-next for a while with no reported issues" * tag 'tty-6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (43 commits) tty: serial: fix help message for SERIAL_CPM serial: 8250: omap: Support wakeup pinctrl state on suspend dt-bindings: serial: 8250_omap: Add wakeup pinctrl state serial: max310x: improve interrupt handling vt: move vc_saved_screen to within tty allocated judgment Revert "m68k: make HPDCA and HPAPCI bools" tty: remove redundant condition checks tty/vt: Add missing return value for VT_RESIZE in vt_ioctl() vt: remove redundant check on vc_mode in con_font_set() serial: qcom-geni: Add DFS clock mode support to GENI UART driver m68k: make HPDCA and HPAPCI bools tty: n_gsm: Don't block input queue by waiting MSC serial: qcom-geni: Fix off-by-one error in ida_alloc_range() serdev: Drop dev_pm_domain_detach() call serial: sc16is7xx: drop redundant conversion to bool vt: add support for smput/rmput escape codes serial: stm32: allow selecting console when the driver is module serial: 8250_core: fix coding style issue tty: serial: Modify the use of dev_err_probe() s390/char/con3270: use tty_port_tty guard() ...
2025-10-01Merge tag 'soc-drivers-6.18' of ↵Linus Torvalds1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC driver updates from Arnd Bergmann: "Lots of platform specific updates for Qualcomm SoCs, including a new TEE subsystem driver for the Qualcomm QTEE firmware interface. Added support for the Apple A11 SoC in drivers that are shared with the M1/M2 series, among more updates for those. Smaller platform specific driver updates for Renesas, ASpeed, Broadcom, Nvidia, Mediatek, Amlogic, TI, Allwinner, and Freescale SoCs. Driver updates in the cache controller, memory controller and reset controller subsystems. SCMI firmware updates to add more features and improve robustness. This includes support for having multiple SCMI providers in a single system. TEE subsystem support for protected DMA-bufs, allowing hardware to access memory areas that managed by the kernel but remain inaccessible from the CPU in EL1/EL0" * tag 'soc-drivers-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (139 commits) soc/fsl/qbman: Use for_each_online_cpu() instead of for_each_cpu() soc: fsl: qe: Drop legacy-of-mm-gpiochip.h header from GPIO driver soc: fsl: qe: Change GPIO driver to a proper platform driver tee: fix register_shm_helper() pmdomain: apple: Add "apple,t8103-pmgr-pwrstate" dt-bindings: spmi: Add Apple A11 and T2 compatible serial: qcom-geni: Load UART qup Firmware from linux side spi: geni-qcom: Load spi qup Firmware from linux side i2c: qcom-geni: Load i2c qup Firmware from linux side soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem soc: qcom: geni-se: Cleanup register defines and update copyright dt-bindings: qcom: se-common: Add QUP Peripheral-specific properties for I2C, SPI, and SERIAL bus Documentation: tee: Add Qualcomm TEE driver tee: qcom: enable TEE_IOC_SHM_ALLOC ioctl tee: qcom: add primordial object tee: add Qualcomm TEE driver tee: increase TEE_MAX_ARG_SIZE to 4096 tee: add TEE_IOCTL_PARAM_ATTR_TYPE_OBJREF tee: add TEE_IOCTL_PARAM_ATTR_TYPE_UBUF tee: add close_context to TEE driver operation ...
2025-09-17dt-bindings: qcom: se-common: Add QUP Peripheral-specific properties for ↵Viken Dadhaniya1-0/+1
I2C, SPI, and SERIAL bus Introduce a new YAML schema for QUP-supported peripherals. Define common properties used across QUP-supported peripherals. Add property `qcom,enable-gsi-dma` to configure the Serial Engine (SE) for QCOM GPI DMA mode. Reference the common schema YAML in the GENI I2C, SPI, and SERIAL YAML files. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Co-developed-by: Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com> Signed-off-by: Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250911043256.3523057-2-viken.dadhaniya@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-15Merge 6.17-rc6 into tty-nextGreg Kroah-Hartman2-26/+32
We need the tty/serial fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-09-12dt-bindings: serial: 8250_omap: Add wakeup pinctrl stateMarkus Schneider-Pargmann1-0/+16
Pins associated with the 8250 omap unit can be the source of a wakeup in deep sleep states. To be able to wakeup, these pins have to be configured in a special way. To support this configuration add the default and wakeup pinctrl states. Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Signed-off-by: Kendall Willis <k-willis@ti.com> Link: https://lore.kernel.org/r/20250910-uart-daisy-chain-8250-omap-v2-1-e90d44c1a9ac@ti.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-14dt-bindings: serial: 8250: allow "main" and "uart" as clock namesAlex Elder1-1/+9
There are two compatible strings defined in "8250.yaml" that require two clocks to be specified, along with their names: - "spacemit,k1-uart", used in "spacemit/k1.dtsi" - "nxp,lpc1850-uart", used in "lpc/lpc18xx.dtsi" When only one clock is used, the name is not required. However there are two places that do specify a name: - In "mediatek/mt7623.dtsi", the clock for the "mediatek,mtk-btif" compatible serial device is named "main" - In "qca/ar9132.dtsi", the clock for the "ns8250" compatible serial device is named "uart" In commit d2db0d7815444 ("dt-bindings: serial: 8250: allow clock 'uartclk' and 'reg' for nxp,lpc1850-uart"), Frank Li added the restriction that two named clocks be used for the NXP platform mentioned above. Change that logic, so that an additional condition for (only) the SpacemiT platform similarly restricts the two clocks to have the names "core" and "bus". Finally, add "main" and "uart" as allowed names when a single clock is specified. Fixes: 2c0594f9f0629 ("dt-bindings: serial: 8250: support an optional second clock") Cc: stable <stable@kernel.org> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202507160314.wrC51lXX-lkp@intel.com/ Signed-off-by: Alex Elder <elder@riscstar.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250813031338.2328392-1-elder@riscstar.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-14dt-bindings: serial: 8250: move a constraintAlex Elder1-24/+22
A block that required a "spacemit,k1-uart" compatible node to specify two clocks was placed in the wrong spot in the binding. Conor Dooley pointed out it belongs earlier in the file, as part of the initial "allOf". Fixes: 2c0594f9f0629 ("dt-bindings: serial: 8250: support an optional second clock") Cc: stable <stable@kernel.org> Reported-by: Conor Dooley <conor@kernel.org> Closes: https://lore.kernel.org/lkml/20250729-reshuffle-contented-e6def76b540b@spud/ Signed-off-by: Alex Elder <elder@riscstar.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250813032151.2330616-1-elder@riscstar.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-14dt-bindings: serial: brcm,bcm7271-uart: Constrain clocksKrzysztof Kozlowski1-1/+1
Lists should have fixed constraints, because binding must be specific in respect to hardware, thus add missing constraints to number of clocks. Cc: stable <stable@kernel.org> Fixes: 88a499cd70d4 ("dt-bindings: Add support for the Broadcom UART driver") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250812121630.67072-2-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-07-29Merge tag 'soc-newsoc-6.17' of ↵Linus Torvalds1-3/+4
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull new SoC support from Arnd Bergmann: "These five newly supported chips come with both devicetree descriptions and the changes to wire them up to the build system for easier bisection. The chips in question are: - Marvell PXA1908 was the first 64-bit mobile phone chip from Marvell in the product line that started with the Digital StrongARM SA1100 based PDAs and continued with the Intel PXA2xx that dominated early smartphones. This one only made it only into a few products before the entire product line was cut in 2015. - The QiLai SoC is made by RISC-V core designer Andes Technologies and is in the 'Voyager' reference board in MicroATX form factor. It uses four in-order AX45MP cores, which is the midrange product from Andes. - CIX P1 is one of the few Arm chips designed for small workstations, and this one uses 12 Cortex-A720/A520 cores, making it also one of the only ARMv9.2 machines that one can but at the moment. - Axiado AX3000 is an embedded chip with relative small Cortex-A53 CPU cores described as a "Trusted Control/Compute Unit" that can be used as a BMC in servers. In addition to the usual I/O, this one comes with 10GBit ethernet and and a 4TOPS NPU. - Sophgo SG2000 is an embedded chip that comes with both RISC-V and Arm cores that can run Linux. This was already supported for RISC-V but now it also works on Arm One more chip, the Black Sesame C1200 did not make it in tirm for the merge window" * tag 'soc-newsoc-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (38 commits) arm64: defconfig: Enable rudimentary Sophgo SG2000 support arm64: Add SOPHGO SOC family Kconfig support arm64: dts: sophgo: Add Duo Module 01 Evaluation Board arm64: dts: sophgo: Add Duo Module 01 arm64: dts: sophgo: Add initial SG2000 SoC device tree MAINTAINERS: Add entry for Axiado arm64: defconfig: enable the Axiado family arm64: dts: axiado: Add initial support for AX3000 SoC and eval board arm64: add Axiado SoC family dt-bindings: i3c: cdns: add Axiado AX3000 I3C controller dt-bindings: serial: cdns: add Axiado AX3000 UART controller dt-bindings: gpio: cdns: add Axiado AX3000 GPIO variant dt-bindings: gpio: cdns: convert to YAML dt-bindings: arm: axiado: add AX3000 EVK compatible strings dt-bindings: vendor-prefixes: Add Axiado Corporation MAINTAINERS: Add CIX SoC maintainer entry arm64: dts: cix: Add sky1 base dts initial support dt-bindings: clock: cix: Add CIX sky1 scmi clock id arm64: defconfig: Enable CIX SoC mailbox: add CIX mailbox driver ...
2025-07-24dt-bindings: serial: snps-dw-apb-uart: Allow use of a power-domainJonas Karlman1-0/+3
The UART controllers in most Rockchip SoCs are part of power domains that are always powered on. These always powered on power domains have typically not been described in the device tree. Because these power domains have been left out of the device tree there has not been any real need to properly describe the UART controllers power domain of Rockchip SoCs. On Rockchip RK3528 the UART controllers are spread out among the described PD_RKVENC, PD_VO and PD_VPU power domains. However, one UART controller belong to an undescribed always powered on power domain. Add support to describe an optional power-domains for the UART controllers. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250723085654.2273324-5-jonas@kwiboo.se Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-07-24dt-bindings: serial: samsung: add samsung,exynos2200-uart compatibleIvaylo Ivanov1-0/+4
Add dedicated samsung,exynos2200-uart compatible to the dt-schema for representing uart of the exynos2200. Like GS101, it has a required DT property samsung,uart-fifosize and exhibits the 32 bit register access limit, so reuse support for it. Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250722120859.443283-1-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-07-22dt-bindings: serial: cdns: add Axiado AX3000 UART controllerHarshit Shah1-3/+4
Add binding for AX3000 UART controller. So far, no changes known, so it can fallback to default compatible. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Harshit Shah <hshah@axiado.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22dt-bindings: serial: describe SA8255pNikunj Kela1-0/+69
SA8255p platform abstracts resources such as clocks, interconnect and GPIO pins configuration in Firmware. SCMI power and perf protocols are used to send request for resource configurations. Add DT bindings for the QUP GENI UART controller on sa8255p platform. The wakeup interrupt (IRQ) is treated as optional, as not all UART instances have a wakeup-capable interrupt routed via the PDC. Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com> Co-developed-by: Praveen Talari <quic_ptalari@quicinc.com> Signed-off-by: Praveen Talari <quic_ptalari@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250721174532.14022-2-quic_ptalari@quicinc.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-07-21dt-bindings: serial: 8250: spacemit: set clocks property as requiredYixun Lan1-1/+3
In SpacemiT's K1 SoC, the clocks for UART are mandatory needed, so for DT, both clocks and clock-names property should be set as required. Fixes: 2c0594f9f062 ("dt-bindings: serial: 8250: support an optional second clock") Signed-off-by: Yixun Lan <dlan@gentoo.org> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250718-01-k1-uart-binding-v1-1-a92e1e14c836@gentoo.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-07-21dt-bindings: serial: renesas: Document RZ/V2N SCIFLad Prabhakar1-0/+1
Document SCIF bindings for the Renesas RZ/V2N (a.k.a R9A09G056) SoC. The SCIF interface in Renesas RZ/V2N is identical to the one available in RZ/V2H(P), so `renesas,scif-r9a09g057` will be used as a fallback, allowing reuse of the existing driver without modifications. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250716202923.163950-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-07-09dt-bindings: serial: rsci: Update maintainer entryLad Prabhakar1-1/+1
Add myself as the maintainer for the Renesas RSCI device tree binding, as Thierry Bultel no longer works for Renesas. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250630202323.279809-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-07-09dt-bindings: serial: renesas,rsci: Add optional secondary clock inputThierry Bultel1-8/+9
Update the RSCI binding to support an optional secondary clock input on the RZ/T2H SoC. At boot, the RSCI operates using the default synchronous clock (PCLKM core clock), which is enabled by the bootloader. However, to support a wider range of baud rates, the hardware also requires an asynchronous external clock input. Clock selection is controlled internally by the CCR3 register in the RSCI block. Due to an incomplete understanding of the hardware, the original binding defined only a single clock ("fck"), which is insufficient to describe the full capabilities of the RSCI on RZ/T2H. This update corrects the binding by allowing up to three clocks and defining the `clock-names` as "operation", "bus", and optionally "sck" for the asynchronous clock input. This is an ABI change, as it modifies the expected number and names of clocks. However, since there are no in-kernel consumers of this binding yet, the change is considered safe and non-disruptive. Also remove the unneeded `serial0` alias from the DTS example and use the R9A09G077_CLK_PCLKM macro for core clock. Signed-off-by: Thierry Bultel <thierry.bultel.yh@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250630202323.279809-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-07-09dt-bindings: serial: sh-sci: Document r8a78000 bindingsNghia Nguyen2-0/+14
R-Car X5H (R8A78000) SoC has the R-Car Gen5 compatible SCIF and HSCIF ports, so document the SoC specific bindings. [Kuninori: tidyup for upstreaming] Signed-off-by: Nghia Nguyen <nghia.nguyen.jg@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/87ecuxdggq.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-07-01dt-bindings: serial: mediatek,uart: add MT6572Max Shevchenko1-0/+1
Add a compatible string for serial on the MT6572 SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Max Shevchenko <wctrl@proton.me> Link: https://lore.kernel.org/r/20250701-mt6572-v3-1-8937cfa33f95@proton.me Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-30Merge 6.16-rc4 into tty-nextGreg Kroah-Hartman5-14/+45
We need the tty/serial fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-29Merge tag 'tty-6.16-rc4' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty Pull tty/serial driver fixes from Greg KH: "Here are five small serial and tty and vt fixes for 6.16-rc4. Included in here are: - kerneldoc fixes for recent vt changes - imx serial driver fix - of_node sysfs fix for a regression - vt missing notification fix - 8250 dt bindings fix All of these have been in linux-next for a while with no reported issues" * tag 'tty-6.16-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: dt-bindings: serial: 8250: Make clocks and clock-frequency exclusive serial: imx: Restore original RXTL for console to fix data loss serial: core: restore of_node information in sysfs vt: fix kernel-doc warnings in ucs_get_fallback() vt: add missing notification when switching back to text mode
2025-06-29dt-bindings: serial: 8250: allow clock 'uartclk' and 'reg' for nxp,lpc1850-uartFrank Li1-4/+37
Allow clock 'uartclk' and 'reg' for nxp,lpc1850-uart to align existed driver and dts. It is really old platform. Keep the same restriction for others. Allow dmas and dma-names property, which allow maxItems 4 because very old platform (arch/arm/boot/dts/nxp/lpc/lpc18xx.dtsi) use duplicate "tx", "rx", "tx", "rx" as dma-names. Fix below CHECK_DTB warnings: arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dtb: serial@40081000 (nxp,lpc1850-uart): clock-names: ['uartclk', 'reg'] is too long Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250602142745.942568-1-Frank.Li@nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-26Merge tag 'devicetree-fixes-for-6.16-1' of ↵Linus Torvalds4-13/+44
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree fixes from Rob Herring: - Convert altr,uart-1.0 and altr,juart-1.0 to DT schema. These were applied for nios2, but never sent upstream. - Fix extra '/' in fsl,ls1028a-reset '$id' path - Fix warnings in ti,sn65dsi83 schema due to unnecessary $ref. * tag 'devicetree-fixes-for-6.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: dt-bindings: serial: Convert altr,uart-1.0 to DT schema dt-bindings: serial: Convert altr,juart-1.0 to DT schema dt-bindings: soc: fsl,ls1028a-reset: Drop extra "/" in $id dt-bindings: drm/bridge: ti-sn65dsi83: drop $ref to fix lvds-vod* warnings
2025-06-24dt-bindings: serial: 8250: Make clocks and clock-frequency exclusiveYao Zi1-1/+1
The 8250 binding before converting to json-schema states, - clock-frequency : the input clock frequency for the UART or - clocks phandle to refer to the clk used as per Documentation/devicetree for clock-related properties, where "or" indicates these properties shouldn't exist at the same time. Additionally, the behavior of Linux's driver is strange when both clocks and clock-frequency are specified: it ignores clocks and obtains the frequency from clock-frequency, left the specified clocks unclaimed. It may even be disabled, which is undesired most of the time. But "anyOf" doesn't prevent these two properties from coexisting, as it considers the object valid as long as there's at LEAST one match. Let's switch to "oneOf" and disallows the other property if one exists, precisely matching the original binding and avoiding future confusion on the driver's behavior. Fixes: e69f5dc623f9 ("dt-bindings: serial: Convert 8250 to json-schema") Cc: stable <stable@kernel.org> Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250623093445.62327-1-ziyao@disroot.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-19dt-bindings: serial: renesas,rsci: Document RZ/N2H supportLad Prabhakar1-1/+7
Add documentation for the serial communication interface (RSCI) found on the Renesas RZ/N2H (R9A09G087) SoC. The RSCI IP on this SoC is identical to that on the RZ/T2H (R9A09G077) SoC. Therefore, "renesas,r9a09g077-rsci" is used as a fallback compatible string for RZ/N2H. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250609192344.293317-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-06-11dt-bindings: serial: Convert altr,uart-1.0 to DT schemaRob Herring (Arm)2-8/+25
Convert the Altera JTAG UART binding to DT schema. The "ALTR,uart-1.0" compatible has long been deprecated, so drop it. Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-06-11dt-bindings: serial: Convert altr,juart-1.0 to DT schemaRob Herring (Arm)2-5/+19
Convert the Altera JTAG UART binding to DT schema. The "ALTR,juart-1.0" compatible has long been deprecated, so drop it. Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-06-06Merge tag 'tty-6.16-rc1' of ↵Linus Torvalds27-272/+658
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty Pull tty/serial updates from Greg KH: "Here is the big set of tty and serial driver changes for 6.16-rc1. A little more churn than normal in this portion of the kernel for this development cycle, Jiri and Nicholas were busy with cleanups and reviews and fixes for the vt unicode handling logic which composed most of the overall work in here. Major changes are: - vt unicode changes/reverts/changes from Nicholas. This should help out a lot with screen readers and others that rely on vt console support - lock guard additions to the core tty/serial code to clean up lots of error handling logic - 8250 driver updates and fixes - device tree conversions to yaml - sh-sci driver updates - other small cleanups and updates for serial drivers and tty core portions All of these have been in linux-next for 2 weeks with no reported issues" * tag 'tty-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (105 commits) tty: serial: 8250_omap: fix TX with DMA for am33xx vt: add VT_GETCONSIZECSRPOS to retrieve console size and cursor position vt: bracketed paste support vt: remove VT_RESIZE and VT_RESIZEX from vt_compat_ioctl() vt: process the full-width ASCII fallback range programmatically vt: make use of ucs_get_fallback() when glyph is unavailable vt: add ucs_get_fallback() vt: create ucs_fallback_table.h_shipped with gen_ucs_fallback_table.py vt: introduce gen_ucs_fallback_table.py to create ucs_fallback_table.h vt: move glyph determination to a separate function vt: make sure displayed double-width characters are remembered as such vt: ucs.c: fix misappropriate in_range() usage serial: max3100: Replace open-coded parity calculation with parity8() dt-bindings: serial: 8250_omap: Drop redundant properties dt-bindings: serial: Convert socionext,milbeaut-usio-uart to DT schema dt-bindings: serial: Convert microchip,pic32mzda-uart to DT schema dt-bindings: serial: Convert arm,sbsa-uart to DT schema dt-bindings: serial: Convert snps,arc-uart to DT schema dt-bindings: serial: Convert marvell,armada-3700-uart to DT schema dt-bindings: serial: Convert lantiq,asc to DT schema ...
2025-05-21dt-bindings: serial: 8250_omap: Drop redundant propertiesKrzysztof Kozlowski1-7/+0
The binding references in-kernel serial.yaml, so there is no need to explicitly list its properties. Note that rts-gpio is also redundant because DTS should be simply converted to -gpios variants. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250514125127.56149-2-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-05-21dt-bindings: serial: Convert socionext,milbeaut-usio-uart to DT schemaRob Herring (Arm)2-21/+56
Convert the Socionext Milbeaut UART binding to DT schema. It is a straight-forward conversion. Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250507154924.1602842-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-05-21dt-bindings: serial: Convert microchip,pic32mzda-uart to DT schemaRob Herring (Arm)2-29/+53
Convert the Microchip PIC32 UART binding to DT schema. The binding was unclear there are 3 interrupts. The functions were determined from the driver. The 'cts-gpios' property is covered by serial.yaml schema. Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250507154937.1603190-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-05-21dt-bindings: serial: Convert arm,sbsa-uart to DT schemaRob Herring (Arm)2-10/+38
Convert the Arm SBSA UART binding to DT schema. It is a straight-forward conversion. Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20250506220016.2545637-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-05-21dt-bindings: serial: Convert snps,arc-uart to DT schemaRob Herring (Arm)2-25/+51
Convert the Synopsys ARC UART binding to DT schema. Drop the "aliases" portion which is not relevant to this schema. Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250507154909.1602497-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-05-21dt-bindings: serial: Convert marvell,armada-3700-uart to DT schemaRob Herring (Arm)2-56/+102
Convert the Marvell Armada-3700 UART binding to DT schema. It is a straight-forward conversion. Drop the long deprecated single interrupt support. Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250507154408.1595932-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-05-21dt-bindings: serial: Convert lantiq,asc to DT schemaRob Herring (Arm)2-31/+56
Convert the Lantiq SoC ASC UART binding to DT schema. There are no such clock identifier defines nor a user with clocks, so drop the example with clocks. Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20250506220029.2546179-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-05-21dt-bindings: serial: Convert cirrus,ep7209-uart to DT schemaRob Herring (Arm)2-31/+56
Convert the Cirrus EP7209 UART binding to DT schema. There is no user of "cirrus,ep7312-uart" other than the example, so drop it. Drop the "aliases" node part as it is not relevant to the schema. The modem control GPIOs are covered by the serial.yaml schema and don't have to be listed in the schema. Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20250506220021.2545820-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-05-21dt-bindings: serial: Convert arm,mps2-uart to DT schemaRob Herring (Arm)2-19/+46
Convert the Arm MPS2 UART binding to DT schema. It is a straight-forward conversion. Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20250506220012.2545470-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-05-21dt-bindings: serial: Convert nxp,lpc3220-hsuart to DT schemaRob Herring (Arm)2-14/+39
Convert the NXP LPC3220 HS UART binding to DT schema. It is a straight-forward conversion. Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org> Acked-by: Vladimir Zapolskiy <vz@mleia.com> Link: https://lore.kernel.org/r/20250506220048.2546915-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-05-21dt-bindings: serial: Convert cnxt,cx92755-usart to DT schemaRob Herring (Arm)2-27/+48
Convert the Conexant Digicolor USART binding to DT schema. It is a straight-forward conversion. Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org> Acked-by: Baruch Siach <baruch@tkos.co.il> Link: https://lore.kernel.org/r/20250506220025.2545995-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-05-21dt-bindings: serial: atmel,at91-usart: add microchip,sama7d65-usartDharma Balasubiramani1-0/+1
Add SAMA7D65 USART compatible to DT bindings documentation. Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/ba19dff5c20bd022cf5391ac909a85ab5e1797b4.1746201835.git.Ryan.Wanner@microchip.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-25dt-bindings: serial: amlogic,meson-uart: Add compatible string for S6/S7/S7DXianwei Zhao1-0/+3
Amlogic S6/S7/7D SoCs uses the same UART controller as S4 SoCs and G12A. There is no need for an extra compatible line in the driver, but add S6/S7/S7D compatible line for documentation. Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/r/20250424-uart-binding-v1-1-eb0f6d97a654@amlogic.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-25dt-bindings: serial: mediatek,uart: Add compatible for MT6893AngeloGioacchino Del Regno1-0/+1
Add a compatible string for the MediaTek Dimensity 1200 (MT6893) SoC, which UART IPs are fully compatible with MT6577. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250416120241.147925-1-angelogioacchino.delregno@collabora.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-22dt-bindings: remove RZ/N1S bindingsWolfram Sang1-9/+3
Except for these four quite random bindings, no further upstream activity has been observed in the last 8 years. So, remove these fragments to reduce maintenance burden. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20250411194849.11067-2-wsa+renesas@sang-engineering.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-11dt-bindings: serial: Add compatible for Renesas RZ/T2H SoC in sciThierry Bultel1-0/+78
RSCI of RZ/T2H SoC (a.k.a r9a09g077), as a lot of similarities with SCI in other Renesas SoC like G2L, G3S, V2L; However, it has a different set of registers, and in addition to serial, this IP also supports SCIe (encoder), SmartCard, i2c and spi. This is why the 'renesas,sci' fallback for generic SCI does not apply for it. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Thierry Bultel <thierry.bultel.yh@bp.renesas.com> Link: https://lore.kernel.org/r/20250403212919.1137670-4-thierry.bultel.yh@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: serial: 8250: support an optional second clockAlex Elder1-1/+29
The SpacemiT UART driver requires a bus clock to be enabled in addition to the primary function clock. Add the option to specify two clocks for an 8250-compatible UART, named "core" and "bus". If both are needed, require them to be named. Signed-off-by: Alex Elder <elder@riscstar.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250409192213.1130181-2-elder@riscstar.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: serial: snps-dw-apb-uart: Simplify DMA-less RZ/N1 ruleGeert Uytterhoeven1-3/+1
There is no need to repeat all SoC-specific compatible values in the rule for DMA-less RZ/N1 variants. Use wildcard "{}" instead, to ease maintenance. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/90c7aa143beb6a28255b24e8ef8c96180d869cbb.1744271974.git.geert+renesas@glider.be Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-03-20dt-bindings: serial: snps-dw-apb-uart: document RZ/N1 binding without DMAWolfram Sang1-0/+20
Renesas RZ/N1D has this UART with and without DMA support. Currently, only the binding with DMA support is described. Add the missing one without DMA support which can fallback even more. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250318085353.18990-2-wsa+renesas@sang-engineering.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-03-20dt-bindings: serial: snps-dw-apb-uart: Add support for rk3562Kever Yang1-0/+1
The UART core on Rockchip's RK3562 is the same as the one already included in generic dw-apb-uart. Extend the binding accordingly to allow compatible = "rockchip,rk3562-uart", "snps,dw-apb-uart"; Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250227111913.2344207-9-kever.yang@rock-chips.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-03-20dt-bindings: serial: fsl-lpuart: support i.MX94Frank Li1-0/+1
Add compatible string "fsl,imx94-lpuart" for the i.MX94 chip, which is backward compatible with i.MX8ULP. Set it to fall back to "fsl,imx8ulp-lpuart". Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250306171052.244548-1-Frank.Li@nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
generated by cgit v1.2.3 (git 2.39.1) at 2026-01-06 12:07:47 +0000