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path: root/arch/arm64/include/asm/sysreg.h
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2022-08-23arm64/sysreg: Guard SYS_FIELD_ macros for asmMark Brown-2/+2
2022-08-23arm64/sysreg: Directly include bitfield.hMark Brown-0/+1
2022-07-25Merge branch 'for-next/cpufeature' into for-next/coreWill Deacon-0/+4
2022-07-05arm64/sysreg: Convert ID_AA64ZFR0_EL1 to automatic generationMark Brown-23/+0
2022-07-05arm64/sysreg: Convert ID_AA64SMFR0_EL1 to automatic generationMark Brown-18/+0
2022-07-05arm64/sysreg: Convert LORID_EL1 to automatic generationMark Brown-2/+0
2022-07-05arm64/sysreg: Convert LORC_EL1 to automatic generationMark Brown-1/+0
2022-07-05arm64/sysreg: Convert LORN_EL1 to automatic generationMark Brown-1/+0
2022-07-05arm64/sysreg: Convert LOREA_EL1 to automatic generationMark Brown-1/+0
2022-07-05arm64/sysreg: Convert LORSA_EL1 to automatic generationMark Brown-1/+0
2022-07-05arm64/sysreg: Convert ID_AA64ISAR2_EL1 to automatic generationMark Brown-27/+0
2022-07-05arm64/sysreg: Convert ID_AA64ISAR1_EL1 to automatic generationMark Brown-34/+0
2022-07-05arm64/sysreg: Convert GMID to automatic generationMark Brown-1/+0
2022-07-05arm64/sysreg: Convert DCZID_EL0 to automatic generationMark Brown-5/+0
2022-07-05arm64/sysreg: Convert CTR_EL0 to automatic generationMark Brown-16/+0
2022-07-05arm64/sysreg: Add _EL1 into ID_AA64ISAR2_EL1 definition namesMark Brown-17/+17
2022-07-05arm64/sysreg: Add _EL1 into ID_AA64ISAR1_EL1 definition namesMark Brown-31/+31
2022-07-05arm64/sysreg: Remove defines for RPRES enumerationMark Brown-2/+0
2022-07-05arm64/sysreg: Standardise naming for ID_AA64ZFR0_EL1 fieldsMark Brown-20/+20
2022-07-05arm64/sysreg: Standardise naming for ID_AA64SMFR0_EL1 enumsMark Brown-15/+15
2022-07-05arm64/sysreg: Standardise naming for WFxT definesMark Brown-3/+3
2022-07-05arm64/sysreg: Make BHB clear feature defines match the architectureMark Brown-1/+1
2022-07-05arm64/sysreg: Align pointer auth enumeration defines with architectureMark Brown-17/+17
2022-07-05arm64/mte: Standardise GMID field name definitionsMark Brown-2/+2
2022-07-05arm64/sysreg: Standardise naming for DCZID_EL0 field namesMark Brown-2/+2
2022-07-05arm64/sysreg: Standardise naming for CTR_EL0 fieldsMark Brown-0/+15
2022-07-05arm64/sysreg: Add SYS_FIELD_GET() helperMark Brown-0/+3
2022-06-23arm64: trap implementation defined functionality in userspaceKristina Martsenko-0/+4
2022-06-08arm64/sme: Fix tests for 0b1111 value ID registersMark Brown-2/+2
2022-05-20arm64/sysreg: Generate definitions for FAR_ELxMark Brown-3/+0
2022-05-20arm64/sysreg: Generate definitions for DACR32_EL2Mark Brown-1/+0
2022-05-20arm64/sysreg: Generate definitions for CSSELR_EL1Mark Brown-2/+0
2022-05-20arm64/sysreg: Generate definitions for CPACR_ELxMark Brown-2/+0
2022-05-20arm64/sysreg: Generate definitions for CONTEXTIDR_ELxMark Brown-2/+0
2022-05-20arm64/sysreg: Generate definitions for CLIDR_EL1Mark Brown-1/+0
2022-05-16arm64/sve: Generate ZCR definitionsMark Brown-7/+0
2022-05-16arm64/sme: Generate defintions for SVCRMark Brown-4/+0
2022-05-16arm64/sme: Generate SMPRI_EL1 definitionsMark Brown-3/+0
2022-05-16arm64/sme: Automatically generate SMPRIMAP_EL2 definitionsMark Brown-1/+0
2022-05-16arm64/sme: Automatically generate SMIDR_EL1 definesMark Brown-1/+0
2022-05-16arm64/sme: Automatically generate defines for SMCRMark Brown-10/+0
2022-05-16arm64/sme: Remove _EL0 from name of SVCR - FIXME sysreg.hMark Brown-3/+3
2022-05-16arm64/sme: Standardise bitfield names for SVCRMark Brown-2/+2
2022-05-16arm64/sme: Drop SYS_ from SMIDR_EL1 definesMark Brown-3/+3
2022-05-16arm64/fp: Rename SVE and SME LEN field name to _WIDTHMark Brown-2/+2
2022-05-16arm64/fp: Make SVE and SME length register definition match architectureMark Brown-14/+4
2022-05-16Merge branch 'for-next/sme' into for-next/sysreg-genCatalin Marinas-0/+67
2022-05-04arm64/sysreg: Generate definitions for SCTLR_EL1Mark Brown-38/+0
2022-05-04arm64/sysreg: Generate definitions for TTBRn_EL1Mark Brown-2/+0
2022-05-04arm64/sysreg: Generate definitions for ID_AA64ISAR0_EL1Mark Brown-20/+0
generated by cgit v1.2.3 (git 2.46.0) at 2026-05-31 04:09:40 +0000