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2026-03-30KVM: arm64: Reclaim faulting page from pKVM in spurious fault handlerWill Deacon-0/+9
2026-03-30KVM: arm64: Introduce hypercall to force reclaim of a protected pageWill Deacon-0/+7
2026-03-30KVM: arm64: Change 'pkvm_handle_t' to u16Will Deacon-1/+1
2026-03-30KVM: arm64: Introduce host_stage2_set_owner_metadata_locked()Will Deacon-2/+0
2026-03-30KVM: arm64: Generalise kvm_pgtable_stage2_set_owner()Will Deacon-11/+28
2026-03-30KVM: arm64: Introduce __pkvm_reclaim_dying_guest_page()Will Deacon-0/+1
2026-03-30KVM: arm64: Introduce __pkvm_host_donate_guest()Will Deacon-1/+2
2026-03-30KVM: arm64: Split teardown hypercall into two phasesWill Deacon-1/+9
2026-03-30KVM: arm64: Remove is_protected_kvm_enabled() checks from hypercallsWill Deacon-10/+14
2026-03-30KVM: arm64: Don't advertise unsupported features for protected guestsWill Deacon-2/+0
2026-03-28KVM: arm64: Disable SPE Profiling Buffer when running in guest contextWill Deacon-0/+1
2026-03-28KVM: arm64: Disable TRBE Trace Buffer Unit when running in guest contextWill Deacon-0/+1
2026-03-27arm64: mpam: Select ARCH_HAS_CPU_RESCTRLJames Morse-0/+2
2026-03-27arm_mpam: resctrl: Add CDP emulationJames Morse-0/+1
2026-03-27arm64: mpam: Add helpers to change a task or cpu's MPAM PARTID/PMG valuesJames Morse-1/+27
2026-03-27arm64: mpam: Initialise and context switch the MPAMSM_EL1 registerBen Horgan-1/+4
2026-03-27arm64: mpam: Context switch the MPAM registersJames Morse-0/+70
2026-03-27arm64: futex: Support futex with FEAT_LSUIYeoreum Yun-2/+185
2026-03-27arm64: futex: Refactor futex atomic operationYeoreum Yun-58/+97
2026-03-26arm64: cpufeature: Add FEAT_LSUIYeoreum Yun-0/+2
2026-03-25arm64: mm: __ptep_set_access_flags must hint correct TTLRyan Roberts-5/+14
2026-03-23KVM: arm64: Remove extra ISBs when using msr_hcr_el2Marc Zyngier-6/+2
2026-03-23KVM: arm64: pkvm: Use direct function pointers for cpu_{on,resume}Marc Zyngier-1/+2
2026-03-23KVM: arm64: nv: Expose shadow page tables in debugfsWei-Lin Chang-0/+13
2026-03-19KVM: arm64: gic-v5: Communicate userspace-driveable PPIs via a UAPISascha Bischoff-0/+1
2026-03-19KVM: arm64: gic-v5: Set ICH_VCTLR_EL2.En on bootSascha Bischoff-0/+2
2026-03-19KVM: arm64: gic: Hide GICv5 for protected guestsSascha Bischoff-0/+1
2026-03-19KVM: arm64: gic-v5: Trap and mask guest ICC_PPI_ENABLERx_EL1 writesSascha Bischoff-1/+0
2026-03-19KVM: arm64: gic-v5: Add vgic-v5 save/restore hyp interfaceSascha Bischoff-0/+27
2026-03-19KVM: arm64: gic-v5: Support GICv5 FGTs & FGUsSascha Bischoff-0/+22
2026-03-19arm64/sysreg: Add GICR CDNMIA encodingSascha Bischoff-0/+7
2026-03-15Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds-0/+3
2026-03-14arm64/mm: Directly use TTBRx_EL1_CnPAnshuman Khandual-2/+0
2026-03-14arm64/mm: Directly use TTBRx_EL1_ASID_MASKAnshuman Khandual-6/+6
2026-03-14arm64/mm: Describe TTBR1_BADDR_4852_OFFSETAnshuman Khandual-2/+5
2026-03-13dma-mapping: Separate DMA sync issuing and completion waitingBarry Song-0/+5
2026-03-13arm64: Provide dcache_inval_poc_nosync helperBarry Song-0/+1
2026-03-13arm64: Provide dcache_clean_poc_nosync helperBarry Song-0/+1
2026-03-13arm64: Provide dcache_by_myline_op_nosync helperBarry Song-6/+19
2026-03-13arm64: mm: Provide level hint for flush_tlb_page()Ryan Roberts-4/+5
2026-03-13arm64: mm: Wrap flush_tlb_page() around __do_flush_tlb_range()Ryan Roberts-59/+28
2026-03-13arm64: mm: More flags for __flush_tlb_range()Ryan Roberts-39/+56
2026-03-13arm64: mm: Refactor __flush_tlb_range() to take flagsRyan Roberts-23/+31
2026-03-13arm64: mm: Refactor flush_tlb_page() to use __tlbi_level_asid()Ryan Roberts-10/+2
2026-03-13arm64: mm: Simplify __flush_tlb_range_limit_excess()Will Deacon-13/+11
2026-03-13arm64: mm: Simplify __TLBI_RANGE_NUM() macroWill Deacon-5/+1
2026-03-13arm64: mm: Re-implement the __flush_tlb_range_op macro in CRyan Roberts-38/+46
2026-03-13arm64: mm: Inline __TLBI_VADDR_RANGE() into __tlbi_range()Will Deacon-19/+13
2026-03-13arm64: mm: Push __TLBI_VADDR() into __tlbi_level()Will Deacon-4/+10
2026-03-13arm64: mm: Implicitly invalidate user ASID based on TLBI operationRyan Roberts-17/+13
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