| Age | Commit message (Expand) | Author | Lines |
|---|
| 2015-04-01 | MIPS: Let __dt_register_buses accept a single bus type | Kevin Cernekee | -1/+4 |
| 2015-04-01 | MIPS: csrc-sb1250: Implement read_sched_clock | Deng-Cheng Zhu | -0/+8 |
| 2015-04-01 | MIPS: csrc-sb1250: Remove FSF mail address from GPL notice | Deng-Cheng Zhu | -4/+0 |
| 2015-04-01 | MIPS: csrc-sb1250: Extract hpt cycle acquisition from sb1250_hpt_read | Deng-Cheng Zhu | -2/+9 |
| 2015-04-01 | MIPS: cevt-txx9: Implement read_sched_clock | Deng-Cheng Zhu | -0/+9 |
| 2015-04-01 | MIPS: csrc-ioasic: Implement read_sched_clock | Deng-Cheng Zhu | -0/+9 |
| 2015-04-01 | MIPS: csrc-ioasic: Remove FSF mail address from GPL notice | Deng-Cheng Zhu | -4/+0 |
| 2015-04-01 | MIPS: csrc-bcm1480: Implement read_sched_clock | Deng-Cheng Zhu | -0/+8 |
| 2015-04-01 | MIPS: csrc-bcm1480: Remove FSF mail address from GPL notice | Deng-Cheng Zhu | -4/+0 |
| 2015-04-01 | MIPS: csrc-r4k: Implement read_sched_clock | Deng-Cheng Zhu | -0/+8 |
| 2015-03-31 | MIPS, ttyFDC: Add early FDC console support | James Hogan | -0/+2 |
| 2015-03-31 | MIPS: idle: Workaround wait + FDC problems | James Hogan | -2/+11 |
| 2015-03-31 | MIPS: Read CPU IRQ line that FDC to routed to | James Hogan | -0/+12 |
| 2015-03-31 | MIPS: Add arch CDMM definitions and probing | James Hogan | -0/+2 |
| 2015-03-31 | MIPS: Allow shared IRQ for timer & perf counter | James Hogan | -2/+0 |
| 2015-03-31 | MIPS: perf: Allow sharing IRQ with timer | James Hogan | -3/+5 |
| 2015-03-31 | MIPS: cevt-r4k: Cleanup c0_compare_interrupt. | Ralf Baechle | -5/+4 |
| 2015-03-31 | MIPS: cevt-r4k: Make interrupt handler shared | James Hogan | -1/+7 |
| 2015-03-31 | MIPS: Remove redundant IPTI==IPPCI logic | James Hogan | -2/+1 |
| 2015-03-31 | MIPS: cevt-r4k: Use CAUSEF_TI, CAUSEF_PCI constants | James Hogan | -1/+1 |
| 2015-03-31 | MIPS: cevt-r4k: Move handle_perf_irq() out of header | James Hogan | -0/+18 |
| 2015-03-24 | mips: copy_thread(): rename 'arg' argument to 'kthread_arg' | Alex Dowad | -2/+8 |
| 2015-02-21 | Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus | Linus Torvalds | -281/+3598 |
| 2015-02-20 | MIPS: OCTEON: Delete unused COP2 saving code | Aleksey Makarov | -26/+0 |
| 2015-02-20 | MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register | Chandrakala Chavva | -3/+3 |
| 2015-02-20 | MIPS: OCTEON: Save and restore CP2 SHA3 state | David Daney | -11/+33 |
| 2015-02-20 | MIPS: OCTEON: Fix FP context save. | David Daney | -12/+7 |
| 2015-02-20 | MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs | David Daney | -30/+98 |
| 2015-02-20 | MIPS: Add set/clear CP0 macros for PageGrain register | Steven J. Hill | -1/+1 |
| 2015-02-19 | Merge branch 'mipsr6-for-3.20' of git://git.linux-mips.org/pub/scm/mchandras/... | Ralf Baechle | -195/+3334 |
| 2015-02-19 | MIPS: Export MSA functions used by lose_fpu(1) for KVM | James Hogan | -0/+4 |
| 2015-02-19 | MIPS: Export FP functions used by lose_fpu(1) for KVM | James Hogan | -0/+6 |
| 2015-02-17 | MIPS: kernel: elf: Improve the overall ABI and FPU mode checks | Markos Chandras | -115/+188 |
| 2015-02-17 | MIPS: kernel: process: Do not allow FR=0 on MIPS R6 | Markos Chandras | -0/+4 |
| 2015-02-17 | MIPS: Make use of the ERETNC instruction on MIPS R6 | Markos Chandras | -0/+21 |
| 2015-02-17 | MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6 | Leonid Yegoshin | -1/+2407 |
| 2015-02-17 | MIPS: Add LLB bit and related feature for the Config 5 CP0 register | Markos Chandras | -0/+2 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions | Markos Chandras | -0/+10 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 BEQZC and JIC instructions | Markos Chandras | -0/+8 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 BALC instruction | Markos Chandras | -0/+10 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructions | Markos Chandras | -1/+5 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructions | Markos Chandras | -0/+11 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 branch compact (BC) instruction | Markos Chandras | -0/+9 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructions | Markos Chandras | -0/+22 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 B{L,G}Ε{Z,}{AL,}C instructions | Markos Chandras | -0/+31 |
| 2015-02-17 | MIPS: Emulate the BC1{EQ,NE}Z FPU instructions | Markos Chandras | -29/+72 |
| 2015-02-17 | MIPS: kernel: branch: Do not emulate the branch likelies on MIPS R6 | Markos Chandras | -7/+63 |
| 2015-02-17 | MIPS: kernel: Prepare the JR instruction for emulation on MIPS R6 | Markos Chandras | -2/+9 |
| 2015-02-17 | MIPS: kernel: syscall: Set the appropriate ISA level for MIPS R6 | Markos Chandras | -1/+1 |
| 2015-02-17 | MIPS: kernel: unaligned: Add support for the MIPS R6 | Leonid Yegoshin | -4/+386 |
