linux - Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/

Age	Commit message (Expand)	Author	Files	Lines
2025-06-11	mm: pgtable: fix pte_swp_exclusive	Magnus Lindholm	1	-1/+1
2025-06-07	Merge tag 'kbuild-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/mas...	Linus Torvalds	1	-1/+1
2025-06-07	arch: use always-$(KBUILD_BUILTIN) for vmlinux.lds	Masahiro Yamada	1	-1/+1
2025-06-06	Merge tag 'riscv-for-linus-6.16-mw1' of git://git.kernel.org/pub/scm/linux/ke...	Linus Torvalds	59	-844/+2187
2025-06-05	Merge patch series "riscv: add SBI FWFT misaligned exception delegation support"	Palmer Dabbelt	5	-18/+257
2025-06-05	Merge patch series "riscv: misaligned: fix misaligned accesses handling in pu...	Palmer Dabbelt	6	-50/+78
2025-06-05	riscv: uaccess: Only restore the CSR_STATUS SUM bit	Cyril Bur	3	-8/+9
2025-06-05	Merge tag 'riscv-mw2-6.16-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/ker...	Palmer Dabbelt	15	-44/+399
2025-06-05	RISC-V: vDSO: Wire up getrandom() vDSO implementation	Xi Ruoyao	6	-0/+306
2025-06-05	riscv: enable mseal sysmap for RV64	Jisheng Zhang	2	-1/+2
2025-06-05	riscv: mm: Add support for Svinval extension	Mayuresh Chitale	1	-0/+31
2025-06-05	Merge tag 'riscv-mw1-6.16-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/ker...	Palmer Dabbelt	38	-767/+1322
2025-06-05	riscv: Improve Kconfig help for RISCV_ISA_V_PREEMPTIVE	Miquel Sabaté Solà	1	-4/+4
2025-06-05	Merge patch series "riscv: Add Zicbop & prefetchw support"	Alexandre Ghiti	9	-10/+142
2025-06-05	riscv: uaccess: do not do misaligned accesses in get/put_user()	Clément Léger	1	-5/+18
2025-06-05	riscv: process: use unsigned int instead of unsigned long for put_user()	Clément Léger	1	-1/+1
2025-06-05	riscv: make unsafe user copy routines use existing assembly routines	Alexandre Ghiti	5	-48/+63
2025-06-05	riscv: hwprobe: export Zabha extension	Alexandre Ghiti	2	-0/+2
2025-06-05	riscv: Make regs_irqs_disabled() more clear	Tiezhu Yang	1	-1/+1
2025-06-05	Merge patch series "riscv: kexec_file: Support loading Image binary file"	Palmer Dabbelt	7	-486/+610
2025-06-05	RISC-V: Kconfig: Fix help text of CMDLINE_EXTEND	谢致邦 (XIE Zhibang)	1	-2/+2
2025-06-05	riscv: module: Optimize PLT/GOT entry counting	Samuel Holland	1	-16/+65
2025-06-05	Merge patch series "riscv: ftrace: atmoic patching and preempt improvements"	Alexandre Ghiti	9	-199/+289
2025-06-05	riscv: Add support for PUD THP	Alexandre Ghiti	6	-2/+120
2025-06-05	riscv: xchg: Prefetch the destination word for sc.w	Guo Ren	1	-1/+3
2025-06-05	riscv: Add ARCH_HAS_PREFETCH[W] support with Zicbop	Guo Ren	1	-0/+24
2025-06-05	riscv: Add support for Zicbop	Alexandre Ghiti	8	-9/+55
2025-06-05	riscv: Introduce Zicbop instructions	Alexandre Ghiti	1	-0/+60
2025-06-05	riscv/kexec_file: Fix comment in purgatory relocator	Yao Zi	1	-1/+1
2025-06-05	riscv: kexec_file: Support loading Image binary file	Song Shuai	5	-1/+101
2025-06-05	riscv: kexec_file: Split the loading of kernel and others	Song Shuai	5	-486/+510
2025-06-05	riscv: ftrace: support direct call using call_ops	Andy Chiu	5	-27/+48
2025-06-05	riscv: Implement HAVE_DYNAMIC_FTRACE_WITH_CALL_OPS	Puranjay Mohan	5	-6/+105
2025-06-05	riscv: ftrace: support PREEMPT	Andy Chiu	1	-1/+1
2025-06-05	riscv: add a data fence for CMODX in the kernel mode	Andy Chiu	1	-1/+14
2025-06-05	riscv: vector: Support calling schedule() for preemptible Vector	Andy Chiu	2	-3/+24
2025-06-05	riscv: ftrace: do not use stop_machine to update code	Andy Chiu	1	-54/+10
2025-06-05	riscv: ftrace: prepare ftrace for atomic code patching	Andy Chiu	3	-97/+98
2025-06-05	riscv: ftrace: align patchable functions to 4 Byte boundary	Andy Chiu	1	-0/+2
2025-06-05	riscv: ftrace factor out code defined by !WITH_ARG	Andy Chiu	2	-49/+0
2025-06-05	riscv: ftrace: support fastcc in Clang for WITH_ARGS	Andy Chiu	3	-2/+28
2025-06-04	riscv: misaligned: add a function to check misalign trap delegability	Clément Léger	2	-2/+21
2025-06-04	riscv: misaligned: move emulated access uniformity check in a function	Clément Léger	1	-6/+14
2025-06-04	riscv: misaligned: declare misaligned_access_speed under CONFIG_RISCV_MISALIGNED	Clément Léger	2	-3/+4
2025-06-04	riscv: misaligned: use on_each_cpu() for scalar misaligned access probing	Clément Léger	1	-2/+6
2025-06-04	riscv: misaligned: request misaligned exception from SBI	Clément Léger	3	-5/+77
2025-06-04	riscv: sbi: add SBI FWFT extension calls	Clément Léger	1	-1/+19
2025-06-04	riscv: sbi: add FWFT extension interface	Clément Léger	2	-0/+74
2025-06-04	riscv: sbi: add new SBI error mappings	Clément Léger	1	-0/+10
2025-06-04	riscv: sbi: remove useless parenthesis	Clément Léger	1	-3/+3