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2025-03-30Merge tag 'locking-urgent-2025-03-28' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds-11/+24
2025-03-28x86/microcode/AMD: Fix __apply_microcode_amd()'s return valueBoris Ostrovsky-1/+1
2025-03-25Merge tag 'crc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/eb...Linus Torvalds-0/+22
2025-03-25Merge tag 'hyperv-next-signed-20250324' of git://git.kernel.org/pub/scm/linux...Linus Torvalds-24/+16
2025-03-25Merge tag 'ras_core_for_v6.15' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds-23/+22
2025-03-25Merge tag 'x86_cache_for_v6.15' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds-457/+481
2025-03-25Merge tag 'x86_bugs_for_v6.15' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds-45/+80
2025-03-25Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds-3/+6
2025-03-25x86/cacheinfo: Apply maintainer-tip coding style fixesAhmed S. Darwish-108/+107
2025-03-25x86/cacheinfo: Introduce cpuid_amd_hygon_has_l3_cache()Ahmed S. Darwish-18/+14
2025-03-25x86/cacheinfo: Relocate CPUID leaf 0x4 cache_type mappingAhmed S. Darwish-7/+8
2025-03-25x86/cacheinfo: Extract out cache self-snoop checksAhmed S. Darwish-11/+13
2025-03-25x86/cacheinfo: Extract out cache level topology ID calculationAhmed S. Darwish-7/+12
2025-03-25x86/cacheinfo: Separate Intel CPUID leaf 0x4 handlingAhmed S. Darwish-56/+54
2025-03-25x86/cacheinfo: Separate CPUID leaf 0x2 handling and post-processing logicAhmed S. Darwish-48/+58
2025-03-25x86/cpu: Use consolidated CPUID leaf 0x2 descriptor tableAhmed S. Darwish-76/+7
2025-03-25x86/cacheinfo: Use consolidated CPUID leaf 0x2 descriptor tableAhmed S. Darwish-106/+8
2025-03-25x86/cpu: Consolidate CPUID leaf 0x2 tablesThomas Gleixner-1/+129
2025-03-25x86/cpu: Use enums for TLB descriptor typesAhmed S. Darwish-25/+3
2025-03-25x86/cacheinfo: Use enums for cache descriptor typesAhmed S. Darwish-7/+2
2025-03-25x86/cacheinfo: Clarify type markers for CPUID leaf 0x2 cache descriptorsAhmed S. Darwish-76/+76
2025-03-25x86/cacheinfo: Rename 'struct _cpuid4_info_regs' to 'struct _cpuid4_info'Ahmed S. Darwish-11/+11
2025-03-25x86/cacheinfo: Separate Intel and AMD CPUID leaf 0x4 code pathsAhmed S. Darwish-41/+54
2025-03-25x86/cacheinfo: Use sysfs_emit() for sysfs attributes show()Ahmed S. Darwish-3/+3
2025-03-25x86/cacheinfo: Move AMD cache_disable_0/1 handling to separate fileAhmed S. Darwish-298/+313
2025-03-25x86/cacheinfo: Separate amd_northbridge from _cpuid4_info_regsAhmed S. Darwish-16/+29
2025-03-25x86/cacheinfo: Consolidate AMD/Hygon leaf 0x8000001d callsAhmed S. Darwish-15/+15
2025-03-25x86/cacheinfo: Standardize _cpuid4_info_regs instance namingAhmed S. Darwish-48/+49
2025-03-25x86/cacheinfo: Align ci_info_init() assignment expressionsAhmed S. Darwish-13/+10
2025-03-25x86/cacheinfo: Constify _cpuid4_info_regs instancesAhmed S. Darwish-3/+4
2025-03-25x86/cacheinfo: Use proper name for cacheinfo instancesThomas Gleixner-46/+43
2025-03-25x86/cacheinfo: Properly name amd_cpuid4()'s first parameterThomas Gleixner-9/+6
2025-03-25x86/cacheinfo: Refactor CPUID leaf 0x2 cache descriptor lookupThomas Gleixner-24/+20
2025-03-25x86/cacheinfo: Use CPUID leaf 0x2 parsing helpersAhmed S. Darwish-18/+6
2025-03-25x86/cpu: Introduce and use CPUID leaf 0x2 parsing helpersAhmed S. Darwish-17/+6
2025-03-25x86/cacheinfo: Remove CPUID leaf 0x2 parsing loopAhmed S. Darwish-40/+37
2025-03-25x86/cpu: Remove CPUID leaf 0x2 parsing loopAhmed S. Darwish-15/+15
2025-03-25x86/split_lock: Simplify reenablingMaksim Davydov-11/+24
2025-03-24Merge tag 'x86-core-2025-03-22' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds-330/+383
2025-03-24Merge tag 'locking-core-2025-03-22' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds-4/+16
2025-03-20x86: hyperv: Add mshv_handler() irq handler and setup functionNuno Das Neves-0/+9
2025-03-20Drivers: hv: Export some functions for use by root partition moduleNuno Das Neves-0/+1
2025-03-20x86/mshyperv: Add support for extended Hyper-V featuresStanislav Kinsburskii-2/+4
2025-03-19x86/cpu/intel: Limit the non-architectural constant_tsc model checksSohil Mehta-4/+6
2025-03-19x86/cpu/intel: Fix fast string initialization for extended FamiliesSohil Mehta-6/+11
2025-03-19x86/cpu/intel: Replace Family 5 model checks with VFM onesSohil Mehta-6/+5
2025-03-19x86/cpu/intel: Replace Family 15 checks with VFM onesSohil Mehta-3/+3
2025-03-19x86/cpu/intel: Replace early Family 6 checks with VFM onesSohil Mehta-6/+5
2025-03-19x86/mtrr: Modify a x86_model check to an Intel VFM checkSohil Mehta-2/+2
2025-03-19x86/microcode: Update the Intel processor flag scan checkSohil Mehta-1/+1
generated by cgit v1.2.3 (git 2.46.0) at 2026-04-01 12:03:24 +0000