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2025-11-13Merge branches 'acpi-cppc' and 'acpi-tables'Rafael J. Wysocki-1/+1
2025-11-13Merge tag 'v6.18-rc5' into objtool/core, to pick up fixesIngo Molnar-118/+130
2025-11-12x86: Restrict KVM-induced symbol exports to KVM modules where obvious/possibleSean Christopherson-46/+57
2025-11-12x86/mtrr: Drop unnecessary export of "mtrr_state"Sean Christopherson-1/+0
2025-11-12x86/bugs: Drop unnecessary export of "x86_spec_ctrl_base"Sean Christopherson-1/+0
2025-11-08Merge tag 'x86-urgent-2025-11-08' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds-99/+54
2025-11-07ACPI: CPPC: Detect preferred core availability on online CPUsGautham R. Shenoy-1/+1
2025-11-07x86/apic: Fix frequency in apic=verbose log outputJulian Stecklina-6/+9
2025-11-07x86/microcode/AMD: Add more known models to entry sign checkingMario Limonciello (AMD)-0/+2
2025-11-05x86/fgraph,bpf: Fix stack ORC unwind from kprobe_multi return probeJiri Olsa-1/+7
2025-11-05x86/mce/amd: Define threshold restart function for banksYazen Ghannam-18/+19
2025-11-05x86/mce/amd: Remove redundant reset_block()Yazen Ghannam-21/+7
2025-11-05x86/mce/amd: Support SMCA Corrected Error InterruptYazen Ghannam-0/+17
2025-11-05x86/mce/amd: Enable interrupt vectors once per-CPU on SMCA systemsYazen Ghannam-68/+53
2025-11-05x86/mce: Unify AMD DFR handler with MCA PollingYazen Ghannam-99/+43
2025-11-05x86/mce: Unify AMD THR handler with MCA PollingYazen Ghannam-28/+23
2025-11-05x86/msr: Add CPU_OUT_OF_SPEC taint name to "unrecognized" pr_warn(msg)Marc Herbert-1/+1
2025-11-05x86: uaccess: don't use runtime-const rewriting in modulesLinus Torvalds-1/+5
2025-11-04x86/CPU/AMD: Add missing terminator for zen5_rdseed_microcodeMario Limonciello-0/+1
2025-11-03x86/amd_node: Fix AMD root device cachingYazen Ghannam-99/+51
2025-10-30x86/smpboot: Mark native_play_dead() as __noreturnThorsten Blum-6/+2
2025-10-30x86/microcode: Mark early_parse_cmdline() as __initYu Peng-1/+1
2025-10-30x86/microcode/AMD: Select which microcode patch to loadBorislav Petkov (AMD)-38/+69
2025-10-30x86/CPU/AMD: Extend Zen6 model rangeBorislav Petkov (AMD)-1/+1
2025-10-29x86/dumpstack: Prevent KASAN false positive warnings in __show_regs()Tengda Wu-2/+21
2025-10-29unwind_user/x86: Teach FP unwind about start of functionPeter Zijlstra-0/+32
2025-10-29x86: Use physical address for DMA mappingLeon Romanovsky-9/+10
2025-10-29Merge branch 'linus/master' into sched/core, to resolve conflictPeter Zijlstra-16/+38
2025-10-28x86/fpu: Ensure XFD state on signal deliveryChang S. Bae-0/+3
2025-10-28x86/CPU/AMD: Add RDSEED fix for Zen5Gregory Price-0/+10
2025-10-27x86/microcode/AMD: Limit Entrysign signature checking to known generationsBorislav Petkov (AMD)-1/+19
2025-10-27Merge tag 'x86_urgent_for_v6.18_rc3' into x86/microcodeBorislav Petkov (AMD)-16/+38
2025-10-24x86/bugs: Remove dead code which might prevent from buildingAndy Shevchenko-7/+0
2025-10-24x86/tsx: Get the tsx= command line parameter with early_param()Petr Tesarik-25/+26
2025-10-24x86/tsx: Make tsx_ctrl_state staticPetr Tesarik-10/+8
2025-10-21x86/bugs: Qualify RETBLEED_INTEL_MSGDavid Kaplan-1/+3
2025-10-21x86/microcode: Fix Entrysign revision check for Zen1/NaplesAndrew Cooper-1/+1
2025-10-21x86/ioapic: Simplify mp_irqdomain_alloc() slightlyChristophe JAILLET-1/+1
2025-10-20x86,fs/resctrl: Fix NULL pointer dereference with events force-disabled in mb...Babu Moger-1/+10
2025-10-17x86/cpufeatures: Add X86_FEATURE_X2AVIC_EXTNaveen N Rao-0/+1
2025-10-16x86/sgx: Enable automatic SVN updates for SGX enclavesElena Reshetova-2/+18
2025-10-16x86/sgx: Implement ENCLS[EUPDATESVN]Elena Reshetova-0/+80
2025-10-16x86/cpufeatures: Add X86_FEATURE_SGX_EUPDATESVN feature flagElena Reshetova-0/+2
2025-10-16x86/sgx: Introduce functions to count the sgx_(vepc_)open()Elena Reshetova-2/+51
2025-10-16sched/topology: Fix sched domain build error for GNR, CWF in SNC-3 modeTim Chen-0/+70
2025-10-16x86/insn: Simplify for_each_insn_prefix()Peter Zijlstra-6/+3
2025-10-16x86/insn,uprobes,alternative: Unify insn_is_nop()Peter Zijlstra-48/+4
2025-10-15x86/CPU/AMD: Prevent reset reasons from being retained across rebootRong Zhang-2/+14
2025-10-15x86/microcode/intel: Enable staging when availableChang S. Bae-0/+17
2025-10-15x86/microcode/intel: Support mailbox transferChang S. Bae-6/+166
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