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Age	Commit message (Expand)	Author	Files	Lines
2021-04-04	xtensa: ISS: add GDBIO implementation to semihosting interface	Max Filippov	2	-0/+70
2021-04-04	xtensa: ISS: split simcall implementation from semihosting interface	Max Filippov	2	-68/+75
2021-04-04	xtensa: simcall.h: Change compitible to compatible	Bhaskar Chowdhury	1	-1/+1
2020-02-07	Merge tag 'xtensa-20200206' of git://github.com/jcmvbkbc/linux-xtensa	Linus Torvalds	1	-5/+3
2020-02-04	xtensa: ISS: improve simcall assembly	Max Filippov	1	-5/+3
2019-12-18	xtensa: ISS: avoid struct timeval	Arnd Bergmann	1	-2/+2
2018-08-20	xtensa: drop unneeded platform/hardware.h headers	Max Filippov	1	-18/+0
2018-08-20	xtensa: rework {CONFIG,PLATFORM}_DEFAULT_MEM_START	Max Filippov	1	-10/+0
2018-08-20	xtensa: drop unused {CONFIG,PLATFORM}_DEFAULT_MEM_SIZE	Max Filippov	1	-1/+0
2017-03-13	xtensa: ISS: add argc/argv simcall definitions	Max Filippov	1	-0/+20
2016-09-20	xtensa: ISS: define simc_exit and use it instead of inline asm	Max Filippov	1	-0/+5
2013-05-09	xtensa: don't use a7 in simcalls	Max Filippov	1	-11/+13
2012-12-18	xtensa: properly fix missing compiler barrier in simcall	Max Filippov	1	-6/+1
2012-12-18	xtensa: ISS: add BASE_BAUD definition to serial.h	Max Filippov	1	-0/+15
2012-10-15	xtensa: ISS: fix specific simcalls	Max Filippov	1	-2/+7
2012-10-03	xtensa: ISS: add dummy serial.h for ISS platform	Max Filippov	1	-0/+0
2012-10-03	xtensa: ISS: fix __simc implementation	Max Filippov	1	-0/+53
2008-11-06	xtensa: move headers files to arch/xtensa/include	Chris Zankel	2	-0/+91