| Age | Commit message (Expand) | Author | Lines |
|---|---|---|---|
| 2020-05-26 | clk: sprd: check its parent status before reading gate clock | Chunyan Zhang | -0/+7 |
| 2020-03-24 | clk: sprd: add gate for pll clocks | Xiaolong Zhang | -0/+17 |
| 2017-12-21 | clk: sprd: add gate clock support | Chunyan Zhang | -0/+111 |
