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2026-02-24clk: scu/imx8qxp: do not register driver in probe()Danilo Krummrich-2/+36
imx_clk_scu_init() registers the imx_clk_scu_driver while commonly being called from IMX driver's probe() callbacks. However, it neither makes sense to register drivers from probe() callbacks of other drivers, nor does the driver core allow registering drivers with a device lock already being held. The latter was revealed by commit dc23806a7c47 ("driver core: enforce device_lock for driver_match_device()") leading to a deadlock condition described in [1]. Besides that, nothing seems to unregister the imx_clk_scu_driver once the corresponding driver module is unloaded, which leaves the driver-core with a dangling pointer. Also, if there are multiple matching devices for the imx8qxp_clk_driver, imx8qxp_clk_probe() calls imx_clk_scu_init() multiple times. However, any subsequent call after the first one will fail, since the driver-core does not allow to register the same struct platform_driver multiple times. Hence, register the imx_clk_scu_driver from module_init() and unregister it in module_exit(). Note that we first register the imx8qxp_clk_driver and then call imx_clk_scu_module_init() to avoid having to call imx_clk_scu_module_exit() in the unwind path of imx8qxp_clk_init(). Fixes: dc23806a7c47 ("driver core: enforce device_lock for driver_match_device()") Fixes: 220175cd3979 ("clk: imx: scu: fix build break when compiled as modules") Reported-by: Alexander Stein <alexander.stein@ew.tq-group.com> Closes: https://lore.kernel.org/lkml/13955113.uLZWGnKmhe@steina-w/ Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> # TQMa8x/MBa8x Link: https://lore.kernel.org/lkml/DFU7CEPUSG9A.1KKGVW4HIPMSH@kernel.org/ [1] Acked-by: Abel Vesa <abelvesa@kernel.org> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Link: https://patch.msgid.link/20260212235842.85934-1-dakr@kernel.org Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-02-22Convert remaining multi-line kmalloc_obj/flex GFP_KERNEL usesKees Cook-3/+3
Conversion performed via this Coccinelle script: // SPDX-License-Identifier: GPL-2.0-only // Options: --include-headers-for-types --all-includes --include-headers --keep-comments virtual patch @gfp depends on patch && !(file in "tools") && !(file in "samples")@ identifier ALLOC = {kmalloc_obj,kmalloc_objs,kmalloc_flex, kzalloc_obj,kzalloc_objs,kzalloc_flex, kvmalloc_obj,kvmalloc_objs,kvmalloc_flex, kvzalloc_obj,kvzalloc_objs,kvzalloc_flex}; @@ ALLOC(... - , GFP_KERNEL ) $ make coccicheck MODE=patch COCCI=gfp.cocci Build and boot tested x86_64 with Fedora 42's GCC and Clang: Linux version 6.19.0+ (user@host) (gcc (GCC) 15.2.1 20260123 (Red Hat 15.2.1-7), GNU ld version 2.44-12.fc42) #1 SMP PREEMPT_DYNAMIC 1970-01-01 Linux version 6.19.0+ (user@host) (clang version 20.1.8 (Fedora 20.1.8-4.fc42), LLD 20.1.8) #1 SMP PREEMPT_DYNAMIC 1970-01-01 Signed-off-by: Kees Cook <kees@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-02-21Convert more 'alloc_obj' cases to default GFP_KERNEL argumentsLinus Torvalds-40/+20
This converts some of the visually simpler cases that have been split over multiple lines. I only did the ones that are easy to verify the resulting diff by having just that final GFP_KERNEL argument on the next line. Somebody should probably do a proper coccinelle script for this, but for me the trivial script actually resulted in an assertion failure in the middle of the script. I probably had made it a bit _too_ trivial. So after fighting that far a while I decided to just do some of the syntactically simpler cases with variations of the previous 'sed' scripts. The more syntactically complex multi-line cases would mostly really want whitespace cleanup anyway. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-02-21Convert 'alloc_flex' family to use the new default GFP_KERNEL argumentLinus Torvalds-21/+21
This is the exact same thing as the 'alloc_obj()' version, only much smaller because there are a lot fewer users of the *alloc_flex() interface. As with alloc_obj() version, this was done entirely with mindless brute force, using the same script, except using 'flex' in the pattern rather than 'objs*'. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-02-21Convert 'alloc_obj' family to use the new default GFP_KERNEL argumentLinus Torvalds-442/+442
This was done entirely with mindless brute force, using git grep -l '\<k[vmz]*alloc_objs*(.*, GFP_KERNEL)' | xargs sed -i 's/\(alloc_objs*(.*\), GFP_KERNEL)/\1)/' to convert the new alloc_obj() users that had a simple GFP_KERNEL argument to just drop that argument. Note that due to the extreme simplicity of the scripting, any slightly more complex cases spread over multiple lines would not be triggered: they definitely exist, but this covers the vast bulk of the cases, and the resulting diff is also then easier to check automatically. For the same reason the 'flex' versions will be done as a separate conversion. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-02-21treewide: Replace kmalloc with kmalloc_obj for non-scalar typesKees Cook-527/+509
This is the result of running the Coccinelle script from scripts/coccinelle/api/kmalloc_objs.cocci. The script is designed to avoid scalar types (which need careful case-by-case checking), and instead replace kmalloc-family calls that allocate struct or union object instances: Single allocations: kmalloc(sizeof(TYPE), ...) are replaced with: kmalloc_obj(TYPE, ...) Array allocations: kmalloc_array(COUNT, sizeof(TYPE), ...) are replaced with: kmalloc_objs(TYPE, COUNT, ...) Flex array allocations: kmalloc(struct_size(PTR, FAM, COUNT), ...) are replaced with: kmalloc_flex(*PTR, FAM, COUNT, ...) (where TYPE may also be *VAR) The resulting allocations no longer return "void *", instead returning "TYPE *". Signed-off-by: Kees Cook <kees@kernel.org>
2026-02-16Merge tag 'mips_7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linuxLinus Torvalds-1/+1
Pull MIPS updates from Thomas Bogendoerfer: "Cleanups and fixes" * tag 'mips_7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (28 commits) Revert "clk: microchip: core: allow driver to be compiled with COMPILE_TEST" Revert "clk: microchip: fix typo in reference to a config option" MIPS: Implement ARCH_HAS_CC_CAN_LINK MIPS: rb532: Fix MMIO UART resource registration MIPS: Work around LLVM bug when gp is used as global register variable MIPS: Loongson64: env: Fixup serial clock-frequency when using LEFI MIPS: Loongson2ef: Use pcibios_align_resource() to block io range MIPS: Loongson2ef: Register PCI controller in early stage clk: microchip: fix typo in reference to a config option MIPS: Loongson64: dts: fix phy-related definition of LS7A GMAC clk: microchip: core: allow driver to be compiled with COMPILE_TEST MIPS: drop unused pic32.h header watchdog: pic32-wdt: update include to use pic32.h from platform_data watchdog: pic32-dmt: update include to use pic32.h from platform_data serial: pic32_uart: update include to use pic32.h from platform_data rtc: pic32: update include to use pic32.h from platform_data pinctrl: pic32: update include to use pic32.h from platform_data mmc: sdhci-pic32: update include to use pic32.h from platform_data irqchip/irq-pic32-evic: update include to use pic32.h from platform_data clk: microchip: core: update include to use pic32.h from platform_data ...
2026-02-15Merge tag 'clk-for-linus' of ↵Linus Torvalds-837/+21574
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "Not much changed in the clk framework this time except the clk.h consumer API moved the context saving APIs around to fix a build error in certain configurations. There was a change to the core framework for CLK_OPS_PARENT_ENABLE behavior during registration, but it wrecked existing drivers that didn't expect things to be turned off during clk registration so it got reverted. This cycle is really a large collection of new clk drivers, primarily for Qualcomm SoCs but also for Amlogic, SpacemiT, Google, and Aspeed. Another big change in here is support for automatic hardware clock gating on Samsung SoCs where the clks turn on and off when needed. Ideally more vendors move to this method for better power savings. The highlights are in the updates section below. Beyond all the new drivers we have a bunch of cleanups like converting drivers from divider_round_rate() to divider_determine_rate() and using scoped for each OF child loops. Otherwise it's the usual data fixes and plugging reference leaks, etc. that's all pretty ordinary but not critical enough to fix until the next release. New Drivers: - Qualcomm Kaanapali global, tcsr, rpmh, display, gpu, camera, and video clk controllers - Qualcomm SM8750 camera clk controllers - Qualcomm MSM8940 and SDM439 global clk controllers - Google GS101 Display Process Unit (DPU) clk controllers - SpacemiT K3 clk controllers - Amlogic t7 clk controllers - Aspeed AST2700 clk controllers Updates: - Convert clock dividers from round_rate() to determine_rate() - Fix sparse warnings, kernel-doc warnings, and plug leaked OF refs - Automatic hardware clk gating on Google GS101 SoCs - Amlogic s4 video clks - CAN-FD clks and resets on Renesas RZ/T2H, RZ/N2H, RZ/V2H, and RZ/V2N - Expanded Serial Peripheral Interface (xSPI) clocks and resets on Renesas RZ/T21H and RZ/N2H - DMAC, interrupt controller (ICU), SPI, and thermal (TSU) clocks and resets on Renesas RZ/V2N - More serial (RSCI) clocks and resets on Renesas RZ/V2H and RZ/V2N - CPU frequency scaling on T-HEAD TH1520" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (165 commits) clk: aspeed: Add reset for HACE/VIDEO dt-bindings: clock: aspeed: Add VIDEO reset definition clk: aspeed: add AST2700 clock driver MAINTAINERS: Add entry for ASPEED clock drivers. clk: aspeed: Move the existing ASPEED clk drivers into aspeed subdirectory. Revert "clk: Respect CLK_OPS_PARENT_ENABLE during recalc" clk: Disable KUNIT_UML_PCI dt-bindings: clk: rs9: Fix DIF pattern match clk: rs9: Convert to DEFINE_SIMPLE_DEV_PM_OPS() clk: rs9: Reserve 8 struct clk_hw slots for for 9FGV0841 clk: qcom: sm8750: Constify 'qcom_cc_desc' in SM8750 camcc clk: zynqmp: pll: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: zynqmp: divider: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: mediatek: Fix error handling in runtime PM setup clk: mediatek: don't select clk-mt8192 for all ARM64 builds clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks clk: mediatek: Refactor pllfh registration to pass device clk: mediatek: Pass device to clk_hw_register for PLLs clk: mediatek: Refactor pll registration to pass device clk: Respect CLK_OPS_PARENT_ENABLE during recalc ...
2026-02-14Merge branches 'clk-aspeed' and 'clk-qcom' into clk-nextStephen Boyd-90/+14903
* clk-aspeed: clk: aspeed: Add reset for HACE/VIDEO dt-bindings: clock: aspeed: Add VIDEO reset definition clk: aspeed: add AST2700 clock driver MAINTAINERS: Add entry for ASPEED clock drivers. clk: aspeed: Move the existing ASPEED clk drivers into aspeed subdirectory. * clk-qcom: (49 commits) clk: qcom: sm8750: Constify 'qcom_cc_desc' in SM8750 camcc clk: qcom: gfx3d: add parent to parent request map clk: qcom: dispcc-sm7150: Fix dispcc_mdss_pclk1_clk_src clk: qcom: dispcc-sdm845: Enable parents for pixel clocks clk: qcom: regmap-divider: convert from divider_round_rate() to divider_determine_rate() clk: qcom: regmap-divider: convert from divider_ro_round_rate() to divider_ro_determine_rate() clk: qcom: alpha-pll: convert from divider_round_rate() to divider_determine_rate() clk: qcom: Add support for GPUCC and GXCLK for Kaanapali clk: qcom: Add support for VideoCC driver for Kaanapali clk: qcom: camcc: Add support for camera clock controller for Kaanapali clk: qcom: dispcc: Add support for display clock controller Kaanapali clk: qcom: clk-alpha-pll: Add support for controlling Pongo EKO_T PLL clk: qcom: clk-alpha-pll: Update the PLL support for cal_l clk: qcom: camcc: Add camera clock controller driver for SM8750 SoC clk: qcom: clk-alpha-pll: Add support for controlling Rivian PLL dt-bindings: clock: qcom: document the Kaanapali GPU Clock Controller dt-bindings: clock: qcom: Add Kaanapali video clock controller dt-bindings: clock: qcom: Add support for CAMCC for Kaanapali dt-bindings: clock: qcom: document Kaanapali DISPCC clock controller dt-bindings: clock: qcom: Add camera clock controller for SM8750 SoC ...
2026-02-14Merge branches 'clk-imx', 'clk-divider', 'clk-rockchip' and 'clk-microchip' ↵Stephen Boyd-290/+225
into clk-next * clk-imx: clk: imx: fracn-gppll: Add 241.90 MHz Support clk: imx: fracn-gppll: Add 332.60 MHz Support * clk-divider: rtc: ac100: convert from divider_round_rate() to divider_determine_rate() clk: zynqmp: divider: convert from divider_round_rate() to divider_determine_rate() clk: x86: cgu: convert from divider_round_rate() to divider_determine_rate() clk: versaclock3: convert from divider_round_rate() to divider_determine_rate() clk: stm32: stm32-core: convert from divider_round_rate_parent() to divider_determine_rate() clk: stm32: stm32-core: convert from divider_ro_round_rate() to divider_ro_determine_rate() clk: sprd: div: convert from divider_round_rate() to divider_determine_rate() clk: sophgo: sg2042-clkgen: convert from divider_round_rate() to divider_determine_rate() clk: nxp: lpc32xx: convert from divider_round_rate() to divider_determine_rate() clk: nuvoton: ma35d1-divider: convert from divider_round_rate() to divider_determine_rate() clk: milbeaut: convert from divider_round_rate() to divider_determine_rate() clk: milbeaut: convert from divider_ro_round_rate() to divider_ro_determine_rate() clk: loongson1: convert from divider_round_rate() to divider_determine_rate() clk: hisilicon: clkdivider-hi6220: convert from divider_round_rate() to divider_determine_rate() clk: bm1880: convert from divider_round_rate() to divider_determine_rate() clk: bm1880: convert from divider_ro_round_rate() to divider_ro_determine_rate() clk: actions: owl-divider: convert from divider_round_rate() to divider_determine_rate() clk: actions: owl-composite: convert from owl_divider_helper_round_rate() to divider_determine_rate() clk: sunxi-ng: convert from divider_round_rate_parent() to divider_determine_rate() clk: sophgo: cv18xx-ip: convert from divider_round_rate() to divider_determine_rate() * clk-rockchip: clk: rockchip: Fix error pointer check after rockchip_clk_register_gate_link() * clk-microchip: dt-bindings: clock: mpfs-clkcfg: Add pic64gx compatibility dt-bindings: clock: mpfs-ccc: Add pic64gx compatibility clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE clk: microchip: core: remove unused include asm/traps.h clk: microchip: core: correct return value on *_get_parent() clk: microchip: core: remove duplicate determine_rate on pic32_sclk_ops
2026-02-14Merge branches 'clk-amlogic', 'clk-thead', 'clk-mediatek' and 'clk-samsung' ↵Stephen Boyd-137/+3750
into clk-next * clk-amlogic: clk: meson: gxbb: use the existing HHI_HDMI_PLL_CNTL3 macro clk: meson: g12a: Limit the HDMI PLL OD to /4 clk: meson: gxbb: Limit the HDMI PLL OD to /4 on GXL/GXM SoCs clk: amlogic: remove potentially unsafe flags from S4 video clocks clk: amlogic: add video-related clocks for S4 SoC dt-bindings: clock: add video clock indices for Amlogic S4 SoC clk: meson: t7: add t7 clock peripherals controller driver clk: meson: t7: add support for the T7 SoC PLL clock dt-bindings: clock: add Amlogic T7 peripherals clock controller dt-bindings: clock: add Amlogic T7 SCMI clock controller dt-bindings: clock: add Amlogic T7 PLL clock controller * clk-thead: clk: thead: th1520-ap: Support CPU frequency scaling clk: thead: th1520-ap: Add macro to define multiplexers with flags clk: thead: th1520-ap: Support setting PLL rates clk: thead: th1520-ap: Add C910 bus clock clk: thead: th1520-ap: Poll for PLL lock and wait for stability dt-bindings: clock: thead,th1520-clk-ap: Add ID for C910 bus clock * clk-mediatek: Revert "clk: Respect CLK_OPS_PARENT_ENABLE during recalc" clk: mediatek: Fix error handling in runtime PM setup clk: mediatek: don't select clk-mt8192 for all ARM64 builds clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks clk: mediatek: Refactor pllfh registration to pass device clk: mediatek: Pass device to clk_hw_register for PLLs clk: mediatek: Refactor pll registration to pass device clk: Respect CLK_OPS_PARENT_ENABLE during recalc dt-bindings: clock: mediatek,mt7622-pciesys: Remove syscon compatible clk: mediatek: Drop __initconst from gates * clk-samsung: clk: samsung: gs101: add support for Display Process Unit (DPU) clocks dt-bindings: samsung: exynos-sysreg: add gs101 dpu compatible dt-bindings: clock: google,gs101-clock: Add DPU clock management unit dt-bindings: clock: google,gs101-clock: fix alphanumeric ordering clk: samsung: fix sysreg save/restore when PM is enabled for CMU clk: samsung: avoid warning message on legacy Exynos (auto clock gating) clk: samsung: gs101: Enable auto_clock_gate mode for each gs101 CMU clk: samsung: Implement automatic clock gating mode for CMUs dt-bindings: clock: google,gs101-clock: add samsung,sysreg property as required clk: samsung: exynosautov920: add clock support dt-bindings: clock: exynosautov920: add MFD clock definitions
2026-02-14Merge branches 'clk-renesas', 'clk-cleanup', 'clk-spacemit' and 'clk-tegra' ↵Stephen Boyd-241/+1973
into clk-next * clk-renesas: (25 commits) dt-bindings: clk: rs9: Fix DIF pattern match clk: rs9: Convert to DEFINE_SIMPLE_DEV_PM_OPS() clk: rs9: Reserve 8 struct clk_hw slots for for 9FGV0841 clk: renesas: Add missing log message terminators clk: renesas: rzg2l: Remove DSI clock rate restrictions clk: renesas: rzv2h: Deassert reset on assert timeout clk: renesas: rzg2l: Deassert reset on assert timeout clk: renesas: cpg-mssr: Unlock before reset verification clk: renesas: r9a09g056: Add entries for CANFD clk: renesas: r9a09g057: Add entries for CANFD clk: renesas: r9a09g077: Add CANFD clocks clk: renesas: cpg-mssr: Handle RZ/T2H register layout in PM callbacks dt-bindings: clock: renesas,r9a09g077/87: Add PCLKCAN ID clk: renesas: cpg-mssr: Simplify pointer math in cpg_rzt2h_mstp_read() clk: renesas: r9a09g056: Add clock and reset entries for TSU clk: renesas: r9a09g057: Add entries for RSCIs clk: renesas: r9a09g056: Add entries for RSCIs clk: renesas: r9a09g056: Add entries for the RSPIs clk: renesas: r9a09g056: Add entries for ICU clk: renesas: r9a09g056: Add entries for the DMACs ... * clk-cleanup: clk: Disable KUNIT_UML_PCI clk: zynqmp: pll: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: zynqmp: divider: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: tegra: tegra124-emc: fix device leak on set_rate() clk: Annotate #else and #endif clk: Merge prepare and unprepare sections clk: Move clk_{save,restore}_context() to COMMON_CLK section clk: clk-apple-nco: Add "apple,t8103-nco" compatible clk: versatile: impd1: Simplify with scoped for each OF child loop clk: scpi: Simplify with scoped for each OF child loop clk: lmk04832: Simplify with scoped for each OF child loop * clk-spacemit: clk: spacemit: k3: add the clock tree clk: spacemit: k3: extract common header clk: spacemit: ccu_pll: add plla type clock clk: spacemit: ccu_mix: add inverted enable gate clock dt-bindings: soc: spacemit: k3: add clock support clk: spacemit: add platform SoC prefix to reset name clk: spacemit: extract common ccu functions reset: spacemit: fix auxiliary device id clk: spacemit: prepare common ccu header clk: spacemit: Hide common clock driver from user controller clk: spacemit: Respect Kconfig setting when building modules * clk-tegra: clk: tegra30: Add CSI pad clock gates clk: tegra: Set CSUS as vi_sensor's gate for Tegra20, Tegra30 and Tegra114 clk: tegra20: Reparent dsi clock to pll_d_out0 clk: tegra: tegra124-emc: Simplify with scoped for each OF child loop clk: tegra: Adjust callbacks in tegra_clock_pm clk: tegra: tegra124-emc: Fix potential memory leak in tegra124_clk_register_emc()
2026-02-11Merge tag 'net-next-7.0' of ↵Linus Torvalds-0/+50
git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next Pull networking updates from Paolo Abeni: "Core & protocols: - A significant effort all around the stack to guide the compiler to make the right choice when inlining code, to avoid unneeded calls for small helper and stack canary overhead in the fast-path. This generates better and faster code with very small or no text size increases, as in many cases the call generated more code than the actual inlined helper. - Extend AccECN implementation so that is now functionally complete, also allow the user-space enabling it on a per network namespace basis. - Add support for memory providers with large (above 4K) rx buffer. Paired with hw-gro, larger rx buffer sizes reduce the number of buffers traversing the stack, dincreasing single stream CPU usage by up to ~30%. - Do not add HBH header to Big TCP GSO packets. This simplifies the RX path, the TX path and the NIC drivers, and is possible because user-space taps can now interpret correctly such packets without the HBH hint. - Allow IPv6 routes to be configured with a gateway address that is resolved out of a different interface than the one specified, aligning IPv6 to IPv4 behavior. - Multi-queue aware sch_cake. This makes it possible to scale the rate shaper of sch_cake across multiple CPUs, while still enforcing a single global rate on the interface. - Add support for the nbcon (new buffer console) infrastructure to netconsole, enabling lock-free, priority-based console operations that are safer in crash scenarios. - Improve the TCP ipv6 output path to cache the flow information, saving cpu cycles, reducing cache line misses and stack use. - Improve netfilter packet tracker to resolve clashes for most protocols, avoiding unneeded drops on rare occasions. - Add IP6IP6 tunneling acceleration to the flowtable infrastructure. - Reduce tcp socket size by one cache line. - Notify neighbour changes atomically, avoiding inconsistencies between the notification sequence and the actual states sequence. - Add vsock namespace support, allowing complete isolation of vsocks across different network namespaces. - Improve xsk generic performances with cache-alignment-oriented optimizations. - Support netconsole automatic target recovery, allowing netconsole to reestablish targets when underlying low-level interface comes back online. Driver API: - Support for switching the working mode (automatic vs manual) of a DPLL device via netlink. - Introduce PHY ports representation to expose multiple front-facing media ports over a single MAC. - Introduce "rx-polarity" and "tx-polarity" device tree properties, to generalize polarity inversion requirements for differential signaling. - Add helper to create, prepare and enable managed clocks. Device drivers: - Add Huawei hinic3 PF etherner driver. - Add DWMAC glue driver for Motorcomm YT6801 PCIe ethernet controller. - Add ethernet driver for MaxLinear MxL862xx switches - Remove parallel-port Ethernet driver. - Convert existing driver timestamp configuration reporting to hwtstamp_get and remove legacy ioctl(). - Convert existing drivers to .get_rx_ring_count(), simplifing the RX ring count retrieval. Also remove the legacy fallback path. - Ethernet high-speed NICs: - Broadcom (bnxt, bng): - bnxt: add FW interface update to support FEC stats histogram and NVRAM defragmentation - bng: add TSO and H/W GRO support - nVidia/Mellanox (mlx5): - improve latency of channel restart operations, reducing the used H/W resources - add TSO support for UDP over GRE over VLAN - add flow counters support for hardware steering (HWS) rules - use a static memory area to store headers for H/W GRO, leading to 12% RX tput improvement - Intel (100G, ice, idpf): - ice: reorganizes layout of Tx and Rx rings for cacheline locality and utilizes __cacheline_group* macros on the new layouts - ice: introduces Synchronous Ethernet (SyncE) support - Meta (fbnic): - adds debugfs for firmware mailbox and tx/rx rings vectors - Ethernet virtual: - geneve: introduce GRO/GSO support for double UDP encapsulation - Ethernet NICs consumer, and embedded: - Synopsys (stmmac): - some code refactoring and cleanups - RealTek (r8169): - add support for RTL8127ATF (10G Fiber SFP) - add dash and LTR support - Airoha: - AN8811HB 2.5 Gbps phy support - Freescale (fec): - add XDP zero-copy support - Thunderbolt: - add get link setting support to allow bonding - Renesas: - add support for RZ/G3L GBETH SoC - Ethernet switches: - Maxlinear: - support R(G)MII slow rate configuration - add support for Intel GSW150 - Motorcomm (yt921x): - add DCB/QoS support - TI: - icssm-prueth: support bridging (STP/RSTP) via the switchdev framework - Ethernet PHYs: - Realtek: - enable SGMII and 2500Base-X in-band auto-negotiation - simplify and reunify C22/C45 drivers - Micrel: convert bindings to DT schema - CAN: - move skb headroom content into skb extensions, making CAN metadata access more robust - CAN drivers: - rcar_canfd: - add support for FD-only mode - add support for the RZ/T2H SoC - sja1000: cleanup the CAN state handling - WiFi: - implement EPPKE/802.1X over auth frames support - split up drop reasons better, removing generic RX_DROP - additional FTM capabilities: 6 GHz support, supported number of spatial streams and supported number of LTF repetitions - better mac80211 iterators to enumerate resources - initial UHR (Wi-Fi 8) support for cfg80211/mac80211 - WiFi drivers: - Qualcomm/Atheros: - ath11k: support for Channel Frequency Response measurement - ath12k: a significant driver refactor to support multi-wiphy devices and and pave the way for future device support in the same driver (rather than splitting to ath13k) - ath12k: support for the QCC2072 chipset - Intel: - iwlwifi: partial Neighbor Awareness Networking (NAN) support - iwlwifi: initial support for U-NII-9 and IEEE 802.11bn - RealTek (rtw89): - preparations for RTL8922DE support - Bluetooth: - implement setsockopt(BT_PHY) to set the connection packet type/PHY - set link_policy on incoming ACL connections - Bluetooth drivers: - btusb: add support for MediaTek7920, Realtek RTL8761BU and 8851BE - btqca: add WCN6855 firmware priority selection feature" * tag 'net-next-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1254 commits) bnge/bng_re: Add a new HSI net: macb: Fix tx/rx malfunction after phy link down and up af_unix: Fix memleak of newsk in unix_stream_connect(). net: ti: icssg-prueth: Add optional dependency on HSR net: dsa: add basic initial driver for MxL862xx switches net: mdio: add unlocked mdiodev C45 bus accessors net: dsa: add tag format for MxL862xx switches dt-bindings: net: dsa: add MaxLinear MxL862xx selftests: drivers: net: hw: Modify toeplitz.c to poll for packets octeontx2-pf: Unregister devlink on probe failure net: renesas: rswitch: fix forwarding offload statemachine ionic: Rate limit unknown xcvr type messages tcp: inet6_csk_xmit() optimization tcp: populate inet->cork.fl.u.ip6 in tcp_v6_syn_recv_sock() tcp: populate inet->cork.fl.u.ip6 in tcp_v6_connect() ipv6: inet6_csk_xmit() and inet6_csk_update_pmtu() use inet->cork.fl.u.ip6 ipv6: use inet->cork.fl.u.ip6 and np->final in ip6_datagram_dst_update() ipv6: use np->final in inet6_sk_rebuild_header() ipv6: add daddr/final storage in struct ipv6_pinfo net: stmmac: qcom-ethqos: fix qcom_ethqos_serdes_powerup() ...
2026-02-11Merge tag 'devicetree-for-7.0' of ↵Linus Torvalds-10/+4
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT core: - Sync dtc/libfdt with upstream v1.7.2-62-ga26ef6400bd8 - Add a for_each_compatible_node_scoped() loop and convert users in cpufreq, dmaengine, clk, cdx, powerpc and Arm - Simplify of/platform.c with scoped loop helpers - Add fw_devlink tracking for "mmc-pwrseq" - Optimize fw_devlink callback code size for pinctrl-N properties - Replace strcmp_suffix() with strends() DT bindings: - Support building single binding targets - Convert google,goldfish-fb, cznic,turris-mox-rwtm, ti,prm-inst - Add bindings for Freescale AVIC, Realtek RTD1xxx system controllers, Microchip 25AA010A EEPROM, OnSemi FIN3385, IEI WT61P803 PUZZLE, Delta Electronics DPS-800-AB power supply, Infineon IR35221 Digital Multi-phase Controller, Infineon PXE1610 Digital Dual Output 6+1 VR12.5 & VR13 CPU Controller, socionext,uniphier-smpctrl, and xlnx,zynqmp-firmware - Lots of trivial binding fixes to address warnings in DTS files. These are mostly for arm64 platforms which is getting closer to be warning free. Some public shaming has helped. - Fix I2C bus node names in examples - Drop obsolete brcm,vulcan-soc binding - Drop unreferenced binding headers" * tag 'devicetree-for-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (60 commits) dt-bindings: interrupt-controller: Add compatiblie string fsl,imx(1|25|27|31|35)-avic dt-bindings: soc: imx: add fsl,aips and fsl,emi compatible strings dt-bindings: display: bridge: lt8912b: Drop reset gpio requirement dt-bindings: firmware: fsl,scu: Mark multi-channel MU layouts as deprecated cpufreq: s5pv210: Simplify with scoped for each OF child loop dmaengine: fsl_raid: Simplify with scoped for each OF child loop clk: imx: imx31: Simplify with scoped for each OF child loop clk: imx: imx27: Simplify with scoped for each OF child loop cdx: Use mutex guard to simplify error handling cdx: Simplify with scoped for each OF child loop powerpc/wii: Simplify with scoped for each OF child loop powerpc/fsp2: Simplify with scoped for each OF child loop ARM: exynos: Simplify with scoped for each OF child loop ARM: at91: Simplify with scoped for each OF child loop of: Add for_each_compatible_node_scoped() helper dt-bindings: Fix emails with spaces or missing brackets scripts/dtc: Update to upstream version v1.7.2-62-ga26ef6400bd8 dt-bindings: crypto: inside-secure,safexcel: Mandate only ring IRQs dt-bindings: crypto: inside-secure,safexcel: Add SoC compatibles of: reserved_mem: Fix placement of __free() annotation ...
2026-02-11Merge tag 'gpio-updates-for-v7.0-rc1' of ↵Linus Torvalds-4/+10
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio updates from Bartosz Golaszewski: "There are two new drivers and some changes to GPIO core but mostly just GPIO driver updates across a wide array of files, adding support for new models as well as various refactoring changes. Nothing controversial and everything has spent a good measure of time in linux-next. GPIOLIB core: - shrink the GPIO bus driver stub code - rework software node support for "undefined" software nodes - provide and use devm_fwnode_gpiod_get_optional() - only compile the OF quirk for MT2701 when needed New drivers: - add the GPIO driver for ROHM bd72720 - add the gpio-line-mux driver providing 1-to-many mapping for a single real GPIO Driver changes: - refactor gpio-pca9570: use lock guard, add missing headers, use devres consistently - add support for a new model (G7 Aspeed sgpiom) to the aspeed-sgpio driver along with some prerequisite refactoring - use device_get_match_data() where applicable and save some lines - add support for more models to gpio-cadence - add the compatible property to reset-gpio and use it in shared GPIO management - drop unnecessary use of irqd_get_trigger_type() in gpio-max77759 - add support for a new variant to gpio-pca953x - extend build coverage with COMPILE_TEST for more drivers - constify configfs structures in gpio-sim and gpio-virtuser - add support for the K3 SoC to gpio-spacemit - implement the missing .get_direction() callback in gpio-max77620 - add support for Tegra264 to gpio-tegra186 - drop unneeded MODULE_ALIAS() from gpio-menz127 DT bindings: - document support for the opencores GPIO controller in gpio-mmio - document new variants for gpio-pca953x Documentation: - extensively describe interrupt source detection for gpio-pca953x and add more models to the list of supported variants" * tag 'gpio-updates-for-v7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (59 commits) gpio: tegra186: Add support for Tegra264 dt-bindings: gpio: Add Tegra264 support gpio: spacemit-k1: Use PDR for pin direction, not SDR/CDR gpio: max77620: Implement .get_direction() callback gpio: aspeed-sgpio: Support G7 Aspeed sgpiom controller dt-bindings: gpio: aspeed,sgpio: Support ast2700 gpio: aspeed-sgpio: Convert IRQ functions to use llops callbacks gpio: aspeed-sgpio: Create llops to handle hardware access gpio: aspeed-sgpio: Remove unused bank name field gpio: aspeed-sgpio: Change the macro to support deferred probe regulator: bd71815: switch to devm_fwnode_gpiod_get_optional gpiolib: introduce devm_fwnode_gpiod_get_optional() wrapper gpio: mmio: Add compatible for opencores GPIO dt-bindings: gpio-mmio: Correct opencores GPIO gpio: pca9570: use lock guards gpio: pca9570: Don't use "proxy" headers gpio: pca9570: Use devm_mutex_init() for mutex initialization MAINTAINERS: Add ROHM BD72720 PMIC power: supply: bd71828-power: Support ROHM BD72720 power: supply: bd71828: Support wider register addresses ...
2026-02-10Revert "clk: microchip: core: allow driver to be compiled with COMPILE_TEST"Thomas Bogendoerfer-5/+1
This reverts commit 026d70dcfe5de1543bb8edb8e50d22dc16863e6b. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2026-02-10Revert "clk: microchip: fix typo in reference to a config option"Thomas Bogendoerfer-1/+1
This reverts commit a6ab150deb4b740334721d18e02ad400a9d888f5. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2026-02-05clk: microchip: fix typo in reference to a config optionLukas Bulwahn-1/+1
Commit 026d70dcfe5d ("clk: microchip: core: allow driver to be compiled with COMPILE_TEST") introduces a typo when referring to a config option in an ifdef directive. Fix this typo. Fixes: 026d70dcfe5d ("clk: microchip: core: allow driver to be compiled with COMPILE_TEST") Signed-off-by: Lukas Bulwahn <lukas.bulwahn@redhat.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2026-02-03clk: aspeed: Add reset for HACE/VIDEOJammy Huang-0/+2
Add mappings of reset per hw's definition. Signed-off-by: Jammy Huang <jammy_huang@aspeedtech.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-02-03clk: aspeed: add AST2700 clock driverRyan Chen-0/+1064
Add AST2700 clock controller driver and also use axiliary device framework register the reset controller driver. Due to clock and reset using the same register region. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-02-03clk: aspeed: Move the existing ASPEED clk drivers into aspeed subdirectory.Ryan Chen-14/+18
Prepare for long-term maintenance and future additions by introducing a dedicated drivers/clk/aspeed/ subdirectory for ASPEED clock drivers. Move the existing ASPEED clock drivers into the new drivers/clk/aspeed/ subdirectory. No functional change, file move only. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-02-03Revert "clk: Respect CLK_OPS_PARENT_ENABLE during recalc"Stephen Boyd-13/+0
This reverts commit 669917676e93fca5ea3c66fc9539830312bec58e. It's been shown to cause problems on i.MX and STM32 platforms where the board doesn't boot. In one case, a clk with CLK_IS_CRITICAL and CLK_OPS_PARENT_ENABLE is being registered causing the parent to be enabled, the rate recalculated, and then the parent is disabled causing the critical clk being registered to stop clocking. A fix for that would be to calculate the rate of the clk after enabling the critical clk itself, but that wouldn't fix another problem where a clk with CLK_OPS_PARENT_ENABLE is registered before the parent is registered. In this case the hardware access in the clk_ops::recalc_rate() function would fail if the parent is disabled. There are even more problems exposed by this patch because it introduces logic that disables clks earlier in system boot than has existed previously. Historically we've not disabled clks until late init (clk_disable_unused) under the assumption that clks have been registered enough to have a consistent view of the clk tree. The clk_disable_unused logic doesn't work very well though, leading to quite a few devices booting with clk_ignore_unused on the kernel command line. Long story short, disabling clks during clk registration is full of pitfalls. Revert this commit until a proper solution can be found. Reported-by: Alexander Stein <alexander.stein@ew.tq-group.com> Closes: https://lore.kernel.org/r/6239343.lOV4Wx5bFT@steina-w Reported-by: Mark Brown <broonie@kernel.org> Closes: https://lore.kernel.org/r/036da7ce-6487-4a6e-9b15-97c6d3bcdcec@sirena.org.uk Cc: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Cc: Brian Masney <bmasney@redhat.com> Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Peng Fan <peng.fan@nxp.com> Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Tested-by: Mark Brown <broonie@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-02-03clk: imx: imx31: Simplify with scoped for each OF child loopKrzysztof Kozlowski-5/+2
Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Acked-by: Abel Vesa <abelvesa@kernel.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260109-of-for-each-compatible-scoped-v3-9-c22fa2c0749a@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-03clk: imx: imx27: Simplify with scoped for each OF child loopKrzysztof Kozlowski-5/+2
Use scoped for-each loop when iterating over device nodes to make code a bit simpler. Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Acked-by: Abel Vesa <abelvesa@kernel.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260109-of-for-each-compatible-scoped-v3-8-c22fa2c0749a@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-02-02clk: Disable KUNIT_UML_PCIPeng Fan-1/+1
commit 031cdd3bc3f3 ("kunit: Enable PCI on UML without triggering WARN()") enables KUNIT_UML_PCI, but clk driver could not work with it. Deselect KUNIT_UML_PCI to avoid the failure. Dump as below: WARNING: CPU: 0 PID: 227 at lib/logic_iomem.c:141 __raw_readl+0xac/0xe0 CPU: 0 UID: 0 PID: 227 Comm: kunit_try_catch Tainted: G Tainted: [N]=TEST Stack: a0883d00 00000001 00000000 ffffff00 603ef142 60044832 6002598b 00000000 00000000 600211b3 00000001 00000000 Call Trace: [<6032534c>] ? __raw_readl+0xac/0xe0 [<60044832>] ? dump_stack_lvl+0x57/0x73 [<6002598b>] ? _printk+0x0/0x61 [<600211b3>] ? __warn.cold+0x61/0xeb [<600212cc>] ? warn_slowpath_fmt+0x8f/0x9c [<6002123d>] ? warn_slowpath_fmt+0x0/0x9c [<6032534c>] ? __raw_readl+0xac/0xe0 [<6002123d>] ? warn_slowpath_fmt+0x0/0x9c [<6029e2ad>] ? clk_gate_endisable+0xcd/0x110 [<6029e315>] ? clk_gate_enable+0x15/0x20 [<6028795e>] ? clk_core_enable+0x6e/0xf0 [<60289f1f>] ? clk_enable+0x4f/0xa0 [<602a06af>] ? clk_gate_test_enable+0xbf/0x360 [<60053df9>] ? os_nsecs+0x29/0x40 [<600cd300>] ? ktime_get_ts64+0x0/0x130 [<600816c0>] ? to_kthread+0x0/0x50 [<602507bb>] ? kunit_try_run_case+0x7b/0x100 [<600816c0>] ? to_kthread+0x0/0x50 [<60252aa0>] ? kunit_generic_run_threadfn_adapter+0x0/0x30 [<60252ab2>] ? kunit_generic_run_threadfn_adapter+0x12/0x30 [<60082091>] ? kthread+0xf1/0x270 [<60047591>] ? new_thread_handler+0x41/0x60 ---[ end trace 0000000000000000 ]--- Reviewed-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-02-02clk: rs9: Convert to DEFINE_SIMPLE_DEV_PM_OPS()Geert Uytterhoeven-4/+4
Convert the Renesas 9-series PCIe clock generator driver from SIMPLE_DEV_PM_OPS() to DEFINE_SIMPLE_DEV_PM_OPS() and pm_sleep_ptr(). This lets us drop the __maybe_unused annotations from its suspend and resume callbacks, and reduces kernel size in case CONFIG_PM or CONFIG_PM_SLEEP is disabled. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-02-02clk: rs9: Reserve 8 struct clk_hw slots for for 9FGV0841Marek Vasut-1/+1
The 9FGV0841 has 8 outputs and registers 8 struct clk_hw, make sure there are 8 slots for those newly registered clk_hw pointers, else there is going to be out of bounds write when pointers 4..7 are set into struct rs9_driver_data .clk_dif[4..7] field. Since there are other structure members past this struct clk_hw pointer array, writing to .clk_dif[4..7] fields corrupts both the struct rs9_driver_data content and data around it, sometimes without crashing the kernel. However, the kernel does surely crash when the driver is unbound or during suspend. Fix this, increase the struct clk_hw pointer array size to the maximum output count of 9FGV0841, which is the biggest chip that is supported by this driver. Cc: stable@vger.kernel.org Fixes: f0e5e1800204 ("clk: rs9: Add support for 9FGV0841") Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Reported-by: Geert Uytterhoeven <geert+renesas@glider.be> Closes: https://lore.kernel.org/CAMuHMdVyQpOBT+Ho+mXY07fndFN9bKJdaaWGn91WOFnnYErLyg@mail.gmail.com Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-01-30clk: microchip: core: allow driver to be compiled with COMPILE_TESTBrian Masney-1/+5
This driver currently only supports builds against a PIC32 target. To avoid future breakage in the future, let's update the Kconfig and the driver so that it can be built with CONFIG_COMPILE_TEST enabled. Note that with the existing asm calls is not how I'd want to do this today if this was a new driver, however I don't have access to this hardware. To avoid any breakage, let's keep the existing behavior. Signed-off-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2026-01-30clk: microchip: core: update include to use pic32.h from platform_dataBrian Masney-1/+1
Use the linux/platform_data/pic32.h include instead of asm/mach-pic32/pic32.h so that the asm variant can be dropped. This is in preparation for allowing some drivers to be compiled on other architectures with COMPILE_TEST enabled. Signed-off-by: Brian Masney <bmasney@redhat.com> Acked-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2026-01-28clk: qcom: sm8750: Constify 'qcom_cc_desc' in SM8750 camccKrzysztof Kozlowski-2/+2
'struct qcom_cc_desc' is passed to qcom_cc_map() and qcom_cc_really_probe() only as pointer to const, so make the memory const for safety. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260128154306.133047-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-01-23clk: zynqmp: pll: Fix zynqmp_clk_divider_determine_rate kerneldocKrzysztof Kozlowski-3/+2
After renaming round_rate->determine, kerneldoc does not match anymore, causing W=1 warnings: pll.c:102 function parameter 'req' not described in 'zynqmp_pll_determine_rate' pll.c:102 expecting prototype for zynqmp_pll_round_rate(). Prototype was for zynqmp_pll_determine_rate() instead Fixes: 193650c7a873 ("clk: zynqmp: pll: convert from round_rate() to determine_rate()") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-01-23clk: zynqmp: divider: Fix zynqmp_clk_divider_determine_rate kerneldocKrzysztof Kozlowski-3/+2
After renaming round_rate->determine, kerneldoc does not match anymore, causing W=1 warnings: Warning: drivers/clk/zynqmp/divider.c:122 function parameter 'req' not described in 'zynqmp_clk_divider_determine_rate' Warning: drivers/clk/zynqmp/divider.c:122 expecting prototype for zynqmp_clk_divider_round_rate(). Prototype was for zynqmp_clk_divider_determine_rate() instead Fixes: 0f9cf96a01fd ("clk: zynqmp: divider: convert from round_rate() to determine_rate()") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-01-22clk: mediatek: Fix error handling in runtime PM setupHaotian Zhang-5/+7
devm_pm_runtime_enable() can fail due to memory allocation. The current code ignores its return value, and when pm_runtime_resume_and_get() fails, it returns directly without unmapping the shared_io region. Add error handling for devm_pm_runtime_enable(). Reorder cleanup labels to properly unmap shared_io on pm_runtime_resume_and_get() failure. Fixes: 2f7b1d8b5505 ("clk: mediatek: Do a runtime PM get on controllers during probe") Signed-off-by: Haotian Zhang <vulab@iscas.ac.cn> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-01-22clk: mediatek: don't select clk-mt8192 for all ARM64 buildsBartosz Golaszewski-1/+1
This option defaults to y for ARCH64 meaning it's built even if we don't want anything related to mediatek. Make the default condition stricter and only build it if ARCH_MEDIATEK is selected. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-01-22clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocksNicolas Frattaroli-6/+11
All the MFGPLL require MFG_EB to be on for any operation on them, and they only tick when MFG_EB is on as well, therefore making this a parent-child relationship. This dependency wasn't clear during the initial upstreaming of these clock controllers, as it only made itself known when I could observe the effects of the clock by bringing up a different piece of hardware. Add a new PLL_PARENT_EN flag to mediatek's clk-pll.h, and check for it when initialising the pll to then translate it into the actual CLK_OPS_PARENT_ENABLE flag. Then add the mfg_eb parent to the mfgpll clocks, and set the new PLL_PARENT_EN flag. Fixes: 03dc02f8c7dc ("clk: mediatek: Add MT8196 mfg clock support") Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-01-22clk: mediatek: Refactor pllfh registration to pass deviceNicolas Frattaroli-17/+20
After refactoring all of PLL to pass the device, it's now fairly easy to refactor pllfh and its users, as pllfh registration wraps PLL registration. Do this refactor and move all of the pllfh users to pass the device as well. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-01-22clk: mediatek: Pass device to clk_hw_register for PLLsNicolas Frattaroli-5/+10
Passing the struct device pointer to clk_hw_register allows for runtime power management to work for the registered clock controllers. However, the mediatek PLL clocks do not do this. Change this by adding a struct device pointer argument to mtk_clk_register_pll, and fix up the only other user of it. Also add a new member to the struct mtk_clk_pll for the struct device pointer, which is set by mtk_clk_register_pll and is used by mtk_clk_register_pll_ops. If mtk_clk_register_pll is called with a NULL struct device pointer, then everything still works as expected; the clock core will simply treat them as previously, i.e. without runtime power management. Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-01-22clk: mediatek: Refactor pll registration to pass deviceNicolas Frattaroli-32/+34
As it stands, mtk_clk_register_plls takes a struct device_node pointer as its first argument. This is a tragic happenstance, as it's trivial to get the device_node from a struct device, but the opposite not so much. The struct device is a much more useful thing to have passed down. Refactor mtk_clk_register_plls to take a struct device pointer instead of a struct device_node pointer, and fix up all users of this function. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-01-22clk: Respect CLK_OPS_PARENT_ENABLE during recalcNicolas Frattaroli-0/+13
When CLK_OPS_PARENT_ENABLE was introduced, it guarded various clock operations, such as setting the rate or switching parents. However, another operation that can and often does touch actual hardware state is recalc_rate, which may also be affected by such a dependency. Add parent enables/disables where the recalc_rate op is called directly. Fixes: fc8726a2c021 ("clk: core: support clocks which requires parents enable (part 2)") Fixes: a4b3518d146f ("clk: core: support clocks which requires parents enable (part 1)") Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-01-22clk: mediatek: Drop __initconst from gatesSjoerd Simons-4/+4
Since commit 8ceff24a754a ("clk: mediatek: clk-gate: Refactor mtk_clk_register_gate to use mtk_gate struct") the mtk_gate structs are no longer just used for initialization/registration, but also at runtime. So drop __initconst annotations. Fixes: 8ceff24a754a ("clk: mediatek: clk-gate: Refactor mtk_clk_register_gate to use mtk_gate struct") Signed-off-by: Sjoerd Simons <sjoerd@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Laura Nao <laura.nao@collabora.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-01-22clk: tegra: tegra124-emc: fix device leak on set_rate()Johan Hovold-1/+1
Make sure to drop the reference taken when looking up the EMC device and its driver data on first set_rate(). Note that holding a reference to a device does not prevent its driver data from going away so there is no point in keeping the reference. Fixes: 2db04f16b589 ("clk: tegra: Add EMC clock driver") Fixes: 6d6ef58c2470 ("clk: tegra: tegra124-emc: Fix missing put_device() call in emc_ensure_emc_driver") Cc: stable@vger.kernel.org # 4.2: 6d6ef58c2470 Cc: Mikko Perttunen <mperttunen@nvidia.com> Cc: Miaoqian Lin <linmq006@gmail.com> Signed-off-by: Johan Hovold <johan@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2026-01-22clk: zynqmp: divider: convert from divider_round_rate() to ↵Brian Masney-2/+3
divider_determine_rate() The divider_round_rate() function is now deprecated, so let's migrate to divider_determine_rate() instead so that this deprecated API can be removed. Note that when the main function itself was migrated to use determine_rate, this was mistakenly converted to: req->rate = divider_round_rate(...) This is invalid in the case when an error occurs since it can set the rate to a negative value. Fixes: 0f9cf96a01fd ("clk: zynqmp: divider: convert from round_rate() to determine_rate()") Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-01-22clk: x86: cgu: convert from divider_round_rate() to divider_determine_rate()Brian Masney-4/+2
The divider_round_rate() function is now deprecated, so let's migrate to divider_determine_rate() instead so that this deprecated API can be removed. Note that when the main function itself was migrated to use determine_rate, this was mistakenly converted to: req->rate = divider_round_rate(...) This is invalid in the case when an error occurs since it can set the rate to a negative value. Fixes: f7a6bed91a19 ("clk: x86: cgu: convert from round_rate() to determine_rate()") Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-01-22clk: versaclock3: convert from divider_round_rate() to divider_determine_rate()Brian Masney-5/+2
The divider_round_rate() function is now deprecated, so let's migrate to divider_determine_rate() instead so that this deprecated API can be removed. Note that when the main function itself was migrated to use determine_rate, this was mistakenly converted to: req->rate = divider_round_rate(...) This is invalid in the case when an error occurs since it can set the rate to a negative value. Fixes: 9e3372b2ebac ("clk: versaclock3: convert from round_rate() to determine_rate()") Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-01-22clk: stm32: stm32-core: convert from divider_round_rate_parent() to ↵Brian Masney-16/+4
divider_determine_rate() The divider_round_rate_parent() function is now deprecated, so let's migrate to divider_determine_rate() instead so that this deprecated API can be removed. Note that when the main function itself was migrated to use determine_rate, this was mistakenly converted to: req->rate = divider_round_rate(...) This is invalid in the case when an error occurs since it can set the rate to a negative value. Fixes: cd1cb38836c0 ("clk: stm32: stm32-core: convert from round_rate() to determine_rate()") Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-01-22clk: stm32: stm32-core: convert from divider_ro_round_rate() to ↵Brian Masney-15/+7
divider_ro_determine_rate() The divider_ro_round_rate() function is now deprecated, so let's migrate to divider_ro_determine_rate() instead so that this deprecated API can be removed. Note that when the main function itself was migrated to use determine_rate, this was mistakenly converted to: req->rate = divider_round_rate(...) This is invalid in the case when an error occurs since it can set the rate to a negative value. Fixes: cd1cb38836c0 ("clk: stm32: stm32-core: convert from round_rate() to determine_rate()") Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-01-22clk: sprd: div: convert from divider_round_rate() to divider_determine_rate()Brian Masney-5/+1
The divider_round_rate() function is now deprecated, so let's migrate to divider_determine_rate() instead so that this deprecated API can be removed. Note that when the main function itself was migrated to use determine_rate, this was mistakenly converted to: req->rate = divider_round_rate(...) This is invalid in the case when an error occurs since it can set the rate to a negative value. Fixes: deb4740a5ff8 ("clk: sprd: div: convert from round_rate() to determine_rate()") Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-01-22clk: sophgo: sg2042-clkgen: convert from divider_round_rate() to ↵Brian Masney-10/+5
divider_determine_rate() The divider_round_rate() function is now deprecated, so let's migrate to divider_determine_rate() instead so that this deprecated API can be removed. Note that when the main function itself was migrated to use determine_rate, this was mistakenly converted to: req->rate = divider_round_rate(...) This is invalid in the case when an error occurs since it can set the rate to a negative value. Note that this commit also removes a debugging message that's not really needed. Fixes: 9a3b6993613d ("clk: sophgo: sg2042-clkgen: convert from round_rate() to determine_rate()") Tested-by: Chen Wang <unicorn_wang@outlook.com> Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-01-22clk: nxp: lpc32xx: convert from divider_round_rate() to divider_determine_rate()Brian Masney-4/+2
The divider_round_rate() function is now deprecated, so let's migrate to divider_determine_rate() instead so that this deprecated API can be removed. Note that when the main function itself was migrated to use determine_rate, this was mistakenly converted to: req->rate = divider_round_rate(...) This is invalid in the case when an error occurs since it can set the rate to a negative value. Fixes: 0879768df240 ("clk: nxp: lpc32xx: convert from round_rate() to determine_rate()") Tested-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-01-22clk: nuvoton: ma35d1-divider: convert from divider_round_rate() to ↵Brian Masney-5/+2
divider_determine_rate() The divider_round_rate() function is now deprecated, so let's migrate to divider_determine_rate() instead so that this deprecated API can be removed. Note that when the main function itself was migrated to use determine_rate, this was mistakenly converted to: req->rate = divider_round_rate(...) This is invalid in the case when an error occurs since it can set the rate to a negative value. Fixes: 215f8aa095a1 ("clk: nuvoton: ma35d1-divider: convert from round_rate() to determine_rate()") Signed-off-by: Brian Masney <bmasney@redhat.com>