summaryrefslogtreecommitdiffstats
path: root/drivers/cxl/core
AgeCommit message (Expand)AuthorLines
2025-01-29Merge tag 'cxl-for-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...Linus Torvalds-67/+254
2025-01-22cxl/core/regs: Refactor out functions to count regblocks of given typeHuaisheng Ye-22/+34
2025-01-13cxl/events: Update Memory Module Event Record to CXL spec rev 3.1Shiju Jose-8/+54
2025-01-13cxl/events: Update DRAM Event Record to CXL spec rev 3.1Shiju Jose-18/+54
2025-01-13cxl/events: Update General Media Event Record to CXL spec rev 3.1Shiju Jose-12/+78
2025-01-13cxl/events: Add Component Identifier formatting for CXL spec rev 3.1Shiju Jose-0/+22
2025-01-13cxl/events: Update Common Event Record to CXL spec rev 3.1Shiju Jose-4/+9
2025-01-13Merge 6.13-rc7 into driver-core-nextGreg Kroah-Hartman-7/+18
2025-01-10driver core: Correct API device_for_each_child_reverse_from() prototypeZijun Hu-2/+2
2025-01-03cxl/pmem: Remove is_cxl_nvdimm_bridge()Zijun Hu-6/+0
2025-01-03cxl/pmem: Replace match_nvdimm_bridge() with API device_match_type()Zijun Hu-6/+3
2025-01-03driver core: Constify API device_find_child() and adapt for various usagesZijun Hu-12/+15
2025-01-02cxl/pci: Add CXL Type 1/2 support to cxl_dvsec_rr_decode()Alejandro Lucero-3/+3
2024-12-10cxl/region: Fix region creation for greater than x2 switchesHuaisheng Ye-7/+18
2024-12-02module: Convert symbol namespace to string literalPeter Zijlstra-103/+103
2024-11-22Merge tag 'cxl-for-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...Linus Torvalds-37/+83
2024-11-08Merge branch 'cxl/for-6.13/dcd-prep' into cxl-for-nextDave Jiang-32/+17
2024-11-08cxl/region: Refactor common create region codeIra Weiny-17/+11
2024-11-08cxl/hdm: Use guard() in cxl_dpa_set_mode()Ira Weiny-15/+6
2024-10-28Merge branch 'cxl/for-6.12/printf' into cxl-for-nextDave Jiang-4/+4
2024-10-28cxl/cdat: Use %pra for dpa range outputsIra Weiny-4/+4
2024-10-28cxl: downgrade a warning message to debug level in cxl_probe_component_regs()Coly Li-1/+1
2024-10-28cxl/core/regs: Add rcd_pcie_cap initializationKobayashi,Daisuke-0/+61
2024-10-25cxl/port: Prevent out-of-order decoder allocationDan Williams-10/+33
2024-10-25cxl/port: Fix use-after-free, permit out-of-order decoder shutdownDan Williams-43/+55
2024-10-25cxl/port: Fix cxl_bus_rescan() vs bus_rescan_devices()Dan Williams-3/+10
2024-10-25cxl/events: Fix Trace DRAM Event RecordShiju Jose-3/+14
2024-10-24cxl/core: Return error when cxl_endpoint_gather_bandwidth() handles a non-PCI...Li Zhijian-0/+3
2024-10-02move asm/unaligned.h to linux/unaligned.hAl Viro-2/+2
2024-09-22cxl: Calculate region bandwidth of targets with shared upstream linkDave Jiang-10/+536
2024-09-22cxl: Preserve the CDAT access_coordinate for an endpointDave Jiang-4/+6
2024-09-18cxl: Fix comment regarding cxl_query_cmd() return dataDave Jiang-1/+1
2024-09-12cxl: Convert cxl_internal_send_cmd() to use 'struct cxl_mailbox' as inputDave Jiang-28/+33
2024-09-12cxl: Move mailbox related bits to the same contextDave Jiang-23/+52
2024-09-09cxl: move cxl headers to new include/cxl/ directoryDave Jiang-1/+1
2024-09-09cxl/region: Remove lock from memory notifier callbackIra Weiny-24/+30
2024-09-09cxl/pci: simplify the check of mem_enabled in cxl_hdm_decode_init()Yanfei Xu-10/+11
2024-09-09cxl/pci: Check Mem_info_valid bit for each applicable DVSECYanfei Xu-4/+4
2024-09-09cxl/pci: Remove duplicated implementation of waiting for memory_info_validYanfei Xu-36/+5
2024-09-09cxl/pci: Fix to record only non-zero rangesYanfei Xu-7/+1
2024-09-03cxl/pci: Remove duplicate host_bridge->native_aer checkingLi Ming-11/+6
2024-09-03cxl/pci: cxl_dport_map_rch_aer() cleanupLi Ming-20/+13
2024-09-03cxl/pci: Rename cxl_setup_parent_dport() and cxl_dport_map_regs()Li Ming-4/+9
2024-09-03cxl/port: Refactor __devm_cxl_add_port() to drop goto patternLi Ming-24/+35
2024-09-03cxl/port: Use scoped_guard()/guard() to drop device_lock() for cxl_portLi Ming-66/+55
2024-09-03cxl/port: Use __free() to drop put_device() for cxl_portLi Ming-21/+15
2024-09-03cxl: Remove duplicate included header file core.hHongbo Li-1/+0
2024-09-03cxl/port: Convert to use ERR_CAST()Yuesong Li-1/+1
2024-08-09cxl/pci: Get AER capability address from RCRB only for RCH dportLi Ming-4/+6
2024-07-28Merge tag 'cxl-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...Linus Torvalds-80/+100