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path: root/drivers/cxl
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2022-06-28cxl/mbox: Fix missing variable payload checks in cmd size validationVishal Verma-2/+4
2022-06-21cxl/mbox: Use __le32 in get,set_lsa mailbox structuresAlison Schofield-7/+7
2022-06-21cxl/core: Use is_endpoint_decoderBen Widawsky-2/+3
2022-06-21cxl: Fix cleanup of port devices on failure to probe driver.Jonathan Cameron-1/+6
2022-05-20cxl/port: Enable HDM Capability after validating DVSEC RangesDan Williams-15/+152
2022-05-19cxl/port: Reuse 'struct cxl_hdm' context for hdm initDan Williams-41/+25
2022-05-19cxl/port: Move endpoint HDM Decoder Capability init to port driverDan Williams-11/+11
2022-05-19cxl/pci: Drop @info argument to cxl_hdm_decode_init()Dan Williams-13/+9
2022-05-19cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()Dan Williams-88/+78
2022-05-19cxl/mem: Skip range enumeration if mem_enable clearDan Williams-1/+3
2022-05-19cxl/mem: Consolidate CXL DVSEC Range enumeration in the coreDan Williams-142/+141
2022-05-19cxl/pci: Move cxl_await_media_ready() to the coreDan Williams-47/+51
2022-05-19cxl/mem: Validate port connectivity before dvsec rangesDan Williams-16/+16
2022-05-19cxl/mem: Fix cxl_mem_probe() error exitDan Williams-2/+4
2022-05-19cxl/pci: Drop wait_for_valid() from cxl_await_media_ready()Dan Williams-4/+0
2022-05-19cxl/pci: Consolidate wait_for_media() and wait_for_media_ready()Dan Williams-20/+3
2022-05-19cxl/mem: Drop mem_enabled check from wait_for_media()Dan Williams-4/+0
2022-04-28cxl: Drop cxl_device_lock()Dan Williams-120/+33
2022-04-28cxl/acpi: Add root device lockdep validationDan Williams-0/+13
2022-04-28cxl: Replace lockdep_mutex with local lock classesDan Williams-4/+18
2022-04-28cxl/mbox: fix logical vs bitwise typoDan Carpenter-1/+1
2022-04-22cxl/mbox: Replace NULL check with IS_ERR() after vmemdup_user()Alison Schofield-1/+1
2022-04-22cxl/mbox: Use type __u32 for mailbox payload sizesAlison Schofield-13/+15
2022-04-22PM: CXL: Disable suspendDan Williams-2/+62
2022-04-12cxl/mem: Replace redundant debug message with a commentDan Williams-4/+10
2022-04-12cxl/mem: Rename cxl_dvsec_decode_init() to cxl_hdm_decode_init()Dan Williams-6/+6
2022-04-12cxl/pci: Make cxl_dvsec_ranges() failure not fatal to cxl_pciDan Williams-9/+18
2022-04-12cxl/mem: Make cxl_dvsec_range() init failure fatalDan Williams-0/+3
2022-04-12cxl/pci: Add debug for DVSEC range init failuresDan Williams-3/+10
2022-04-12cxl/mem: Drop DVSEC vs EFI Memory Map sanity checkDan Williams-23/+1
2022-04-12cxl/mbox: Use new return_code handlingDavidlohr Bueso-3/+3
2022-04-12cxl/mbox: Improve handling of mbox_cmd hw return codesDavidlohr Bueso-3/+54
2022-04-12cxl/pci: Use CXL_MBOX_SUCCESS to check against mbox_cmd return codeDavidlohr Bueso-2/+2
2022-04-12cxl/mbox: Drop mbox_mutex commentDavidlohr Bueso-1/+1
2022-04-12cxl/pmem: Remove CXL SET_PARTITION_INFO from exclusive_cmds listAlison Schofield-1/+0
2022-04-12cxl/mbox: Block immediate mode in SET_PARTITION_INFO commandAlison Schofield-0/+48
2022-04-12cxl/mbox: Move cxl_mem_command param to a local variableAlison Schofield-12/+8
2022-04-12cxl/mbox: Make handle_mailbox_cmd_from_user() use a mbox paramAlison Schofield-27/+17
2022-04-12cxl/mbox: Remove dependency on cxl_mem_command for a debug msgAlison Schofield-3/+14
2022-04-12cxl/mbox: Construct a users cxl_mbox_cmd in the validation pathAlison Schofield-4/+17
2022-04-12cxl/mbox: Move build of user mailbox cmd to a helper functionsAlison Schofield-25/+45
2022-04-12cxl/mbox: Move raw command warning to raw command validationAlison Schofield-3/+2
2022-04-12cxl/mbox: Move cxl_mem_command construction to helper funcsAlison Schofield-71/+76
2022-04-08cxl/pci: Drop shadowed variableDan Williams-1/+0
2022-03-22cxl/core/port: Fix NULL but dereferenced coccicheck errorWan Jiabing-1/+4
2022-02-17cxl/port: Hold port reference until decoder releaseDan Williams-0/+4
2022-02-17cxl/port: Fix endpoint refcount leakDan Williams-1/+2
2022-02-11cxl/core: Fix cxl_device_lock() class detectionDan Williams-1/+1
2022-02-11cxl/core/port: Fix unregister_port() lock assertionDan Williams-4/+20
2022-02-08cxl/regs: Fix size of CXL Capability Header RegisterJonathan Cameron-2/+2
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