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path: root/drivers/cxl
AgeCommit message (Expand)AuthorLines
2026-02-03cxl/acpi: Prepare use of EFI runtime servicesRobert Richter-2/+6
2026-02-03cxl: Introduce callback for HPA address ranges translationRobert Richter-0/+25
2026-02-03cxl/region: Use region data to get the root decoderRobert Richter-26/+24
2026-02-03cxl/region: Add @hpa_range argument to function cxl_calc_interleave_pos()Robert Richter-6/+8
2026-02-03cxl/region: Separate region parameter setup and region constructionRobert Richter-9/+26
2026-02-03cxl: Simplify cxl_root_ops allocation and handlingRobert Richter-24/+18
2026-02-03cxl/region: Store HPA range in struct cxl_regionRobert Richter-0/+9
2026-02-03cxl/region: Store root decoder in struct cxl_regionRobert Richter-18/+21
2026-02-03cxl/region: Rename misleading variable name @hpa to @hpa_rangeRobert Richter-13/+15
2026-02-02Merge branch 'for-7.0/cxl-aer-prep' into cxl-for-nextDave Jiang-160/+302
2026-02-02cxl/port: Unify endpoint and switch port lookupDan Williams-1/+11
2026-02-02cxl/port: Move endpoint component register management to cxl_portDan Williams-67/+60
2026-02-02cxl/port: Map Port RAS registersTerry Bowman-0/+29
2026-02-02cxl/port: Move dport RAS setup to dport add timeDan Williams-26/+47
2026-02-02cxl/port: Move dport probe operations to a driver eventDan Williams-74/+89
2026-02-02cxl/port: Move decoder setup before dport creationDan Williams-12/+21
2026-02-02cxl/port: Cleanup dport removal with a devres groupDan Williams-10/+61
2026-02-02cxl/port: Reduce number of @dport variables in cxl_port_add_dport()Dan Williams-15/+23
2026-02-02cxl/port: Cleanup handling of the nr_dports 0 -> 1 transitionDan Williams-16/+15
2026-01-30Merge branch 'for-7.0/cxl-misc' into cxl-for-nextDave Jiang-2/+1
2026-01-29cxl: Fix premature commit_end increment on decoder commit failureYuxiong Wang-2/+1
2026-01-23Merge branch 'for-7.0/cxl-init' into cxl-for-nextDave Jiang-110/+199
2026-01-22Merge branch 'for-7.0/cxl-aer-prep' into cxl-for-nextDave Jiang-425/+388
2026-01-22cxl/region: Use do_div() for 64-bit modulo operationAlison Schofield-1/+2
2026-01-22cxl/region: Translate HPA to DPA and memdev in unaligned regionsAlison Schofield-0/+46
2026-01-22cxl/region: Translate DPA->HPA in unaligned MOD3 regionsAlison Schofield-5/+155
2026-01-22cxl/core: Fix cxl_dport debugfs EINJ entriesCheatham, Benjamin-3/+5
2026-01-22cxl/acpi: Remove cxl_acpi_set_cache_size()Li Ming-24/+5
2026-01-22cxl/hdm: Fix newline character in dev_err() messagesRobert Richter-2/+2
2026-01-22cxl/pci: Remove outdated FIXME comment and BUILD_BUG_ONSamasth Norway Ananda-7/+0
2026-01-22cxl: Update RAS handler interfaces to also support CXL PortsTerry Bowman-17/+13
2026-01-22cxl/mem: Clarify @host for devm_cxl_add_nvdimm()Dan Williams-8/+10
2026-01-22cxl/pci: Move CXL driver's RCH error handling into core/ras_rch.cTerry Bowman-123/+125
2026-01-22PCI/AER: Replace PCIEAER_CXL symbol with CXL_RASDan Williams-1/+1
2026-01-22cxl/pci: Remove CXL VH handling in CONFIG_PCIEAER_CXL conditional blocks from...Dave Jiang-194/+232
2026-01-22cxl/pci: Remove unnecessary CXL RCH handling helper functionsTerry Bowman-14/+2
2026-01-22cxl/pci: Remove unnecessary CXL Endpoint handling helper functionsTerry Bowman-18/+8
2026-01-22PCI: Update CXL DVSEC definitionsTerry Bowman-37/+37
2026-01-22PCI: Move CXL DVSEC definitions into uapi/linux/pci_regs.hTerry Bowman-53/+0
2026-01-14ACPI: extlog: Trace CPER CXL Protocol Error SectionFabio M. De Francesco-1/+2
2026-01-13cxl: Check for invalid addresses returned from translation functions on errorsRobert Richter-9/+27
2026-01-12cxl/hdm: Fix potential infinite loop in __cxl_dpa_reserve()Li Ming-1/+1
2026-01-09cxl/acpi: Restore HBIW check before dereferencing platform_dataAlison Schofield-2/+9
2026-01-09cxl/port: Fix target list setup for multiple decoders sharing the same dportRobert Richter-1/+1
2026-01-05cxl/region: fix format string for resource_size_tArnd Bergmann-1/+1
2026-01-05cxl/mem: Introduce cxl_memdev_attach for CXL-dependent operationDan Williams-11/+56
2026-01-05cxl/mem: Drop @host argument to devm_cxl_add_memdev()Dan Williams-11/+9
2026-01-05cxl/mem: Convert devm_cxl_add_memdev() to scope-based-cleanupDan Williams-26/+44
2026-01-05cxl/port: Arrange for always synchronous endpoint attachDan Williams-43/+42
2026-01-05cxl/mem: Arrange for always-synchronous memdev attachDan Williams-4/+27
generated by cgit v1.2.3 (git 2.46.0) at 2026-05-29 17:01:37 +0000