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path: root/drivers/gpu/drm/amd/display/dc/clk_mgr
AgeCommit message (Expand)AuthorLines
2026-02-21Convert more 'alloc_obj' cases to default GFP_KERNEL argumentsLinus Torvalds-36/+18
2026-02-21treewide: Replace kmalloc with kmalloc_obj for non-scalar typesKees Cook-18/+36
2026-02-12drm/amd/display: Increase DCN35 SR enter/exit latencyLeo Li-8/+8
2026-02-03drm/amd/display: Make DCN35 OTG disable w/a reusableNicholas Kazlauskas-1/+7
2026-01-20drm/amd/display: Revert "init dispclk from bootup clock for DCN315"Wang, Sung-huai-88/+3
2026-01-20drm/amd/display: Revert "init dispclk from bootup clock for DCN314"Wang, Sung-huai-134/+4
2025-12-08drm/amd/display: Remove periodic detection callbacks from dcn35+Dillon Varone-2/+0
2025-11-11drm/amd/display: refactor DSC cap calculation for dcn35Mohit Bawa-0/+30
2025-10-28drm/amd/display: init dispclk from bootup clock for DCN315Zhongwei Zhang-2/+86
2025-10-13drm/amd/display: Remove comparing uint32_t to zeroAlex Hung-8/+8
2025-10-13drm/amd/display: Prevent Gating DTBCLK before It Is Properly LatchedFangzhi Zuo-1/+3
2025-09-25drm/amd/display: Reject modes with too high pixel clock on DCE6-10Timur Kristóf-0/+8
2025-09-23drm/amd/display: Init DCN35 clocks from pre-os HW valuesLeo Li-2/+119
2025-09-23drm/amd/display: Revert "correct sw cache timing to ensure dispclk ramping"Charlene Liu-21/+9
2025-09-23drm/amd/display: Correct sw cache timing to ensure dispclk rampingCharlene Liu-9/+21
2025-09-23drm/amd/display: Refactor SMU tracingDillon Varone-7/+12
2025-09-23drm/amd/display: Isolate dcn401 SMU functionsDillon Varone-14/+140
2025-09-23drm/amd/display: Init dispclk from bootup clock for DCN314Lo-an Chen-5/+142
2025-09-15drm/amd/display: Rename header file link.h to link_service.hWesley Chalmers-8/+8
2025-09-15drm/amd/display: Add pixel_clock to amd_pp_display_configurationTimur Kristóf-1/+1
2025-08-29drm/amd/display: use max() to improve codeQianfeng Rong-10/+3
2025-08-18drm/amd/display: Fix DP audio DTO1 clock source on DCE 6.Timur Kristóf-15/+6
2025-08-18drm/amd/display: Fill display clock and vblank time in dce110_fill_display_co...Timur Kristóf-11/+3
2025-08-18drm/amd/display: Find first CRTC and its line time in dce110_fill_display_con...Timur Kristóf-10/+20
2025-08-18drm/amd/display: Adjust DCE 8-10 clock, don't overclock by 15%Timur Kristóf-7/+5
2025-08-18drm/amd/display: Don't overclock DCE 6 by 15%Timur Kristóf-5/+3
2025-08-04drm/amd/display: update dpp/disp clock from smu clock tablePaul Hsieh-0/+16
2025-08-04drm/amd/display: Fix DCE 6.0 and 6.4 PLL programming.Timur Kristóf-0/+5
2025-08-04drm/amd/display: Don't overwrite dce60_clk_mgrTimur Kristóf-1/+0
2025-07-15drm/amd/display: Initial support for SmartMuxAurabindo Pillai-4/+226
2025-07-15drm/amd/display: Free memory allocationClayton King-1/+2
2025-07-15drm/amd/display: Refactor DSC cap calculationsDillon Varone-0/+32
2025-06-18drm/amd/display: Refactor DML2 DC power instanceDillon Varone-0/+21
2025-06-18drm/amd/display: Remove dml/dcn401 files and referencesDillon Varone-38/+29
2025-04-22drm/amd/display: Remove unused *vbios_smu_set_dprefclkDr. David Alan Gilbert-30/+0
2025-04-07drm/amd/display: rename IPS2 entry/exit messageSherry Wang-3/+3
2025-04-07drm/amd/display: Correct SSC enable detection for DCN351Kevin Gao-1/+8
2025-04-07drm/amd/display: Use sync version of indirect register access.JinZe.Xu-15/+14
2025-03-18drm/amd/display: Guard against setting dispclk low for dcn31xJing Zhou-11/+22
2025-03-18drm/amd/display: Check pipe->stream before passing it to a functionAlex Hung-9/+6
2025-03-10drm/amd/display: remove minimum Dispclk and apply oem panel timing.Charlene Liu-4/+0
2025-03-05drm/amd/display: misc for dio encoder refactorPeichen Huang-5/+15
2025-02-19drm/amd/display: Guard against setting dispclk low when activeNicholas Kazlauskas-4/+9
2025-02-12drm/amd/display: Exclude clkoffset and ips setting for dcn351 specificCharlene Liu-2/+2
2025-02-12drm/amd/display: Populate register address for dentist for dcn401Dillon Varone-0/+2
2025-01-28drm/amd/display: Correct register address in dcn35loanchen-1/+1
2025-01-10drm/amd/display: avoid reset DTBCLK at clock initCharlene Liu-6/+12
2025-01-10drm/amd/display: Add SMU interface to get UMC count for dcn401Dillon Varone-1/+27
2025-01-10drm/amd/display: Log Hard Min Clocks and Phantom Pipe StatusSung Lee-0/+16
2025-01-06drm/amd/display: Cleanup outdated interfaces in dcn401_clk_mgrDillon Varone-223/+17
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