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path: root/drivers/gpu/drm/amd/display/dc/clk_mgr
AgeCommit message (Expand)AuthorLines
2026-03-30drm/amd/display: Fixed Silence complier warnings in dcGaghik Khachatrian-0/+24
2026-03-30drm/amd/display: Move FPU Guards From DML To DC - Part 1Rafal Ostrowski-4/+0
2026-03-30drm/amd/display: Fixed silence signed/unsigned mismatch warningsClay King-2/+2
2026-03-30drm/amd/display: Fix silence signed/unsigned mismatch warnings in dmlClay King-0/+1
2026-03-30drm/amd/display: Fix Silence signed/unsighed mismatch warning in dcGaghik Khachatrian-1/+1
2026-03-30drm/amd/display: eliminate clock manager code duplicationGabe Teeger-13/+21
2026-03-30drm/amd/display: Add NULL check for integrated_info in clk_mgr_constructSrinivasan Shanmugam-17/+24
2026-03-23drm/amd/display: Hardcode dtbclk value in bw_paramsMatthew Stewart-5/+2
2026-03-23drm/amd/display: Move DPM clk read to clk_mgr_construct in DCN42Ivan Lipski-0/+5
2026-03-23drm/amd/display: Fix DCN42 memory clock table using MemClk instead of UClkAlexander Chechik-1/+1
2026-03-23drm/amd/display: Add Extra SMU Log for dtbclkCharlene Liu-0/+3
2026-03-23drm/amd/display: Clamp min DS DCFCLK value to DCN limitRoman Li-0/+5
2026-03-23drm/amd/display: move dcn42 bw_params initDmytro Laktyushkin-5/+4
2026-03-23drm/amd/display: Move DPM clk read to clk_mgr_construct in DCN42Ivan Lipski-124/+126
2026-03-17drm/amd: fix dcn 2.01 checkAndy Nguyen-4/+4
2026-03-11drm/amd/display: Sync dcn42 with DC 3.2.373Roman Li-66/+77
2026-03-11drm/amd/display: Enable dcn42 DC clk_mgrRoman Li-117/+135
2026-03-11drm/amd/display: Clean up unused codeClay King-0/+1
2026-03-02drm/amd/display: Prevent integer overflow when mhz to khzAlex Hung-13/+13
2026-03-02drm/amd/display: Remove redundant initializersAlex Hung-5/+5
2026-02-23drm/amd/display: Enable dcn42 DCRoman Li-1/+10
2026-02-23drm/amd/display: Add dcn42 DC resourcesRoman Li-0/+1852
2026-02-23drm/amd/display: Handle DCE 6 in dce_clk_mgr.cTimur Kristóf-216/+52
2026-02-23drm/amd/display: Remove unused dce60_clk_mgr register definitionsTimur Kristóf-27/+3
2026-02-21Convert more 'alloc_obj' cases to default GFP_KERNEL argumentsLinus Torvalds-36/+18
2026-02-21treewide: Replace kmalloc with kmalloc_obj for non-scalar typesKees Cook-18/+36
2026-02-12drm/amd/display: Increase DCN35 SR enter/exit latencyLeo Li-8/+8
2026-02-03drm/amd/display: Make DCN35 OTG disable w/a reusableNicholas Kazlauskas-1/+7
2026-01-20drm/amd/display: Revert "init dispclk from bootup clock for DCN315"Wang, Sung-huai-88/+3
2026-01-20drm/amd/display: Revert "init dispclk from bootup clock for DCN314"Wang, Sung-huai-134/+4
2025-12-08drm/amd/display: Remove periodic detection callbacks from dcn35+Dillon Varone-2/+0
2025-11-11drm/amd/display: refactor DSC cap calculation for dcn35Mohit Bawa-0/+30
2025-10-28drm/amd/display: init dispclk from bootup clock for DCN315Zhongwei Zhang-2/+86
2025-10-13drm/amd/display: Remove comparing uint32_t to zeroAlex Hung-8/+8
2025-10-13drm/amd/display: Prevent Gating DTBCLK before It Is Properly LatchedFangzhi Zuo-1/+3
2025-09-25drm/amd/display: Reject modes with too high pixel clock on DCE6-10Timur Kristóf-0/+8
2025-09-23drm/amd/display: Init DCN35 clocks from pre-os HW valuesLeo Li-2/+119
2025-09-23drm/amd/display: Revert "correct sw cache timing to ensure dispclk ramping"Charlene Liu-21/+9
2025-09-23drm/amd/display: Correct sw cache timing to ensure dispclk rampingCharlene Liu-9/+21
2025-09-23drm/amd/display: Refactor SMU tracingDillon Varone-7/+12
2025-09-23drm/amd/display: Isolate dcn401 SMU functionsDillon Varone-14/+140
2025-09-23drm/amd/display: Init dispclk from bootup clock for DCN314Lo-an Chen-5/+142
2025-09-15drm/amd/display: Rename header file link.h to link_service.hWesley Chalmers-8/+8
2025-09-15drm/amd/display: Add pixel_clock to amd_pp_display_configurationTimur Kristóf-1/+1
2025-08-29drm/amd/display: use max() to improve codeQianfeng Rong-10/+3
2025-08-18drm/amd/display: Fix DP audio DTO1 clock source on DCE 6.Timur Kristóf-15/+6
2025-08-18drm/amd/display: Fill display clock and vblank time in dce110_fill_display_co...Timur Kristóf-11/+3
2025-08-18drm/amd/display: Find first CRTC and its line time in dce110_fill_display_con...Timur Kristóf-10/+20
2025-08-18drm/amd/display: Adjust DCE 8-10 clock, don't overclock by 15%Timur Kristóf-7/+5
2025-08-18drm/amd/display: Don't overclock DCE 6 by 15%Timur Kristóf-5/+3
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