| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2024-05-02 | drm/amd/display: Refactor DCCG into component folder | Revalla Hari Krishna | 1 | -125/+0 |
| 2023-06-09 | drm/amd/display: Trigger DIO FIFO resync on commit streams for DCN32 | Saaem Rizvi | 1 | -2/+3 |
| 2023-03-22 | drm/amd/display: Implement workaround for writing to OTG_PIXEL_RATE_DIV register | Saaem Rizvi | 1 | -1/+2 |
| 2023-03-07 | drm/amd/display: Simplify register offsets | Chris Park | 1 | -36/+0 |
| 2022-06-03 | drm/amd/display: Updates for OTG and DCCG clocks | Samson Tam | 1 | -0/+4 |
| 2022-06-03 | drm/amd/display: add DCN32/321 specific files for Display Core | Aurabindo Pillai | 1 | -0/+155 |
