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path: root/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2024-05-02drm/amd/display: Refactor DCCG into component folderRevalla Hari Krishna1-1051/+0
2024-04-30drm/amd/display: Revert "dc: Keep VBios pixel rate div setting util next mode...Webb Chen1-5/+3
2024-04-30drm/amd/display: Enable RCO for PHYSYMCLK in DCN35Daniel Miess1-45/+0
2024-04-30drm/amd/display: Add trigger FIFO resync path for DCN35Nicholas Kazlauskas1-0/+10
2024-04-30drm/amd/display: Keep VBios pixel rate div setting util next mode setWebb Chen1-3/+5
2024-04-09drm/amd/display: Toggle additional RCO options in DCN35Daniel Miess1-7/+200
2023-12-06drm/amd/display: Add missing dcn35 RCO registersDaniel Miess1-2/+60
2023-11-17drm/amd/display: Enable DCN clock gating for DCN35Daniel Miess1-0/+30
2023-11-07drm/amd/display: Enable physymclk RCODaniel Miess1-32/+40
2023-11-07drm/amd/display: Enable RCO options for dcn35Daniel Miess1-0/+1
2023-09-26drm/amd/display: Fix DP2.0 timing syncIlya Bakoulin1-0/+1
2023-09-20drm/amd/display: Fix MST recognizes connected displays as oneMuhammad Ahmed1-21/+74
2023-09-20drm/amd/display: Add reset for SYMCLKC_FE_SRC_SELTaimur Hassan1-10/+15
2023-08-30drm/amd/display: Add DCN35 DCCGQingqing Zhuo1-0/+737
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