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path: root/drivers/gpu/drm/amd/display/dc/link
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2026-03-30drm/amd/display: Fixed Silence complier warnings in dcGaghik Khachatrian-0/+31
[Why] Resolve compiler warnings by marking unused parameters explicitly. [How] In .c and .h function definitions, keep parameter names in signatures and add a line with `(void)param;` in function body Preserved function signatures and avoids breaking code paths that may reference the parameter under conditional compilation. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Reviewed-by: Austin Zheng <austin.zheng@amd.com> Signed-off-by: Gaghik Khachatrian <gaghik.khachatrian@amd.com> Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-30Revert "drm/amd/display: Rework YCbCr422 DSC policy"Relja Vojvodic-7/+7
Revert commit 19b79e4f2182 ("drm/amd/display: Rework YCbCr422 DSC policy") Reason for Revert: This commit is causing compliance failures Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Relja Vojvodic <Relja.Vojvodic@amd.com> Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-30drm/amd/dc: Add link output control for DPIALincheng Ku-7/+11
[Why] To support specific sequencing requirements for DPIA link output [How] Implement the dpia_link_hwss structure and define the necessary control function pointers. The initialization order is aligned with the core link_hwss definition to ensure consistency Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Lincheng Ku <LinCheng.Ku@amd.com> Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-23drm/amd/display: Rework YCbCr422 DSC policyRelja Vojvodic-6/+7
- Reworked YCbCr4:2:2 Native/Simple policy decision making with DSC enabled based on DSC caps and stream signal type Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Relja Vojvodic <Relja.Vojvodic@amd.com> Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-11drm/amd/display: Enable dcn42 DC clk_mgrRoman Li-0/+1
Add support for DCN 4.2 clock manager. Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-11drm/amd/display: Clean up unused codeClay King-13/+1
[WHAT] Silence warning by cleaning up unused code. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Clay King <clayking@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-11drm/amd/display: Add ESD detection for replay recoveryWeiguang Li-11/+25
[HOW] Add Replay recovery flow so that when HPD occurs and ESD is detected, Replay can restore the system back to normal. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Reviewed-by: Robin Chen <robin.chen@amd.com> Reviewed-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Weiguang Li <wei-guang.li@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-11drm/amd/display: Return early from vesa replay enable functionPeichen Huang-11/+12
[WHY & HOW] If the enable state is already as expect then just return. Reviewed-by: Robin Chen <robin.chen@amd.com> Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Peichen Huang <PeiChen.Huang@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-03-02drm/amd/display: Initialize replay_state to PR_STATE_INVALIDIvan Lipski-1/+1
[WHY & HOW] Initialize the replay_state variable to PR_STATE_INVALID instead of PR_STATE_0 before retrieving the actual replay state. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-23drm/amd/display: Fix DPIA number and driver ID field issueCruise Hung-1/+1
[Why] The DPIA number field is 6 bits in the spec. In dp_type, it only defines 5 bits. The driver ID is only 4 bits in the spec. [How] Set DPIA number field size to 6. And only update 4 bits for driver id. Reviewed-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com> Signed-off-by: Cruise Hung <Cruise.Hung@amd.com> Signed-off-by: Ivan Lipski <ivan.lipski@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-23drm/amd/display: Use external DP bridge encodersTimur Kristóf-1/+28
Implement link creation for external DP bridge encoders such as NUTMEG and TRAVIS used with CIK APUs such as Kaveri for supporting analog and LVDS connections. Typically found in CIK APU based laptops or on FM2 motherboards that have analog connectors. When we query connector information from the VBIOS and discover a connector using such an encoder, let's find the real DisplayPort encoder and use that. Set the connector signal type to DP, so the pre-existing DP code paths can work with it without refactoring every signal type check in the DC code base. In the DM, make sure to report correct connector type and also to initialize DP specifics such as the AUX channel. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-23drm/amd/display: Link detection for external DP bridge encodersTimur Kristóf-14/+14
Deal with some minor idiosyncracies of TRAVIS and NUTMEG chips. - Always use DP signal type with these chips so that the normal DP code paths can work with them without a major refactor of the code base. Properly set this. - NUTMEG seems to only work with HBR, not RBR, so set a preferred link rate for this chip. See amdgpu_atombios_dp_get_dp_link_config() for reference. - NUTMEG is recognized as a DP branch device but reports 0 sinks, which is wrong and confuses DC (it hits an early return). Fix that by hardcoding the sink count to 1. - Fixup old DC code selecting a special panel mode necessary for NUTMEG and TRAVIS. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-23drm/amd/display: Use preferred DP link rate if specifiedTimur Kristóf-0/+2
The DisplayPort code already has the concept of preferred link settings, but it only allows setting a preferred lane count and link width at the same time. It does not consider the possiblity that some devices may not work on lower link rates but may support various lane counts. Allow specifying a preferred link rate which will be used as the initial link rate when deciding the DP link settings. This is necessary to support NUTMEG which only works with HBR but not with RBR. For reference, see the legacy non-DC amdgpu display code: amdgpu_atombios_dp_get_dp_link_config() Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-23drm/amd/display: Add ability for HWSS to prepare the DDC before useTimur Kristóf-0/+3
Make it possible to add a HWSS function to prepare the DDC before trying to use it. This is going to be necessary for external DP bridge encoders. This commit just adds the function to common DC code. The actual implementation of this function for DCE is done in a subsequent commit. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-23drm/amd/display: Implement DDC probe over AUX channelTimur Kristóf-2/+9
DDC probe means that we use the DDC (Display Data Channel) to verify whether a display is connected or not. This was written with mainly analog connectors in mind, so it didn't work over the AUX channel. However, in order to support external DP bridge encoders found in CIK APUs, it needs to work over the AUX channel too. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-23drm/amd/display: Refactor DAC load detection, move to HWSSTimur Kristóf-21/+3
Slightly refactor and simplify DAC load detection. This prepares the code to be used for also executing DAC load detection on external DP bridge encoders. DAC load detection belongs better in the hardware sequencer code because the implementation is HW dependent and not all chips support the functionality. The code is cleaner when link detection probably doesn't call the VBIOS directly. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-23drm/amd/display: Refactor and fix link_dpms infoDominik Kaszewski-81/+84
[Why] get_ext_hdmi_settings contained a copy-paste error, assigning both reg_num_6g and reg_num from dp0_ext_hdmi_6g_reg_num. [How] * Correctly assign reg_num from dp0_ext_hdmi_reg_num. * Refactor and clean the function. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Dominik Kaszewski <dominik.kaszewski@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-23drm/amd/display: Refactor and fix link_dpms I2CDominik Kaszewski-310/+165
[Why] link_dpms.c issues I2C writes during HDMI link enablement. Current implementation contains a lot of duplicated code with copy-paste errors. [How] * Refactor common logic into helper functions. * Invert logic with early returns to decrease indentation. * Sequence writes by looping over data arrays. * Fix write_i2c_retimer_setting is_over_340mhz checking reg_settings instead of reg_settings_6g in the i2c_reg_index <= 0x20 check. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Dominik Kaszewski <dominik.kaszewski@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-21Convert 'alloc_obj' family to use the new default GFP_KERNEL argumentLinus Torvalds-3/+3
This was done entirely with mindless brute force, using git grep -l '\<k[vmz]*alloc_objs*(.*, GFP_KERNEL)' | xargs sed -i 's/\(alloc_objs*(.*\), GFP_KERNEL)/\1)/' to convert the new alloc_obj() users that had a simple GFP_KERNEL argument to just drop that argument. Note that due to the extreme simplicity of the scripting, any slightly more complex cases spread over multiple lines would not be triggered: they definitely exist, but this covers the vast bulk of the cases, and the resulting diff is also then easier to check automatically. For the same reason the 'flex' versions will be done as a separate conversion. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-02-21treewide: Replace kmalloc with kmalloc_obj for non-scalar typesKees Cook-4/+3
This is the result of running the Coccinelle script from scripts/coccinelle/api/kmalloc_objs.cocci. The script is designed to avoid scalar types (which need careful case-by-case checking), and instead replace kmalloc-family calls that allocate struct or union object instances: Single allocations: kmalloc(sizeof(TYPE), ...) are replaced with: kmalloc_obj(TYPE, ...) Array allocations: kmalloc_array(COUNT, sizeof(TYPE), ...) are replaced with: kmalloc_objs(TYPE, COUNT, ...) Flex array allocations: kmalloc(struct_size(PTR, FAM, COUNT), ...) are replaced with: kmalloc_flex(*PTR, FAM, COUNT, ...) (where TYPE may also be *VAR) The resulting allocations no longer return "void *", instead returning "TYPE *". Signed-off-by: Kees Cook <kees@kernel.org>
2026-02-19drm/amd/display: Enable DAC in DCE link encoderTimur Kristóf-1/+13
Ensure that the DAC output is enabled at the correct time by moving it to the DCE link encoder similarly to how digital outputs are enabled. This also removes the call to DAC1EncoderControl from the DCE HWSS, which always felt like it was a hacky solution. Fixes: 0fbe321a93ce ("drm/amd/display: Implement DCE analog link encoders (v2)") Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Tested-by: Mauro Rossi <issor.oruam@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-19drm/amd/display: Don't call find_analog_engine() twiceTimur Kristóf-1/+0
The analog engine is already there in the link_analog_engine variable and assigned to enc_init_data.analog_engine already. I suspect this was a rebase mistake. Fixes: 436d0d22aa70 ("drm/amd/display: Pass proper DAC encoder ID to VBIOS") Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Tested-by: Mauro Rossi <issor.oruam@gmail.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-19drm/amd/display: Disable SR feature on eDP1 by defaultCharlene Liu-1/+1
[Why & How] Disable SR feature on eDP1 by default. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-12drm/amd/display: Make GPIO HPD path conditionalRoman Li-5/+12
[Why] Avoid unnecessary GPIO configuration attempts on dcn that doesn't support it. [How] Conditionally use GPIO HPD detection or rely on hw encoder path. Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-12drm/amd/display: use enum value for panel replay settingPeichen Huang-2/+2
[WHY & HOW] use enum value for Panel Replay setting. Reviewed-by: Robin Chen <robin.chen@amd.com> Signed-off-by: Peichen Huang <PeiChen.Huang@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-12drm/amd/display: Refactor virtual directory reorganize encoder and hwss files.Bhuvanachandra Pinninti-1/+93
[why] Virtual encoders & hwss were grouped in a separate directory, not aligned with dio and link component structure. [how] Moved virtual_link_encoder and virtual_stream_encoder to dc/dio/virtual/. Moved virtual_link_hwss to dc/link/hwss/ and renamed to link_hwss_virtual. Removed dc/virtual/ directory. Updated all includes and build files (Makefiles) Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Bhuvanachandra Pinninti <bpinnint@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-12drm/amd/display: Check frame skip capability in Sink sideLeon Huang-0/+10
[Why&How] Frame skip capability is described in AMD VSDB in EDID. Need to retrieve the cap and determine fr.skipping mode enablement Reviewed-by: ChunTao Tso <chuntao.tso@amd.com> Signed-off-by: Leon Huang <Leon.Huang1@amd.com> Signed-off-by: Tom Chung <chiahsuan.chung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-03drm/amd/display: External panel replay fsm controlPeichen Huang-0/+52
[WHY] To correctly control external panel replay fsm. [HOW] 1. External panel replay is 1-A option only now. 2. Update cursor update and dirty rects commands for external panel replay support. 3. Add external panel replay support flag in dc. Reviewed-by: Robin Chen <robin.chen@amd.com> Signed-off-by: Peichen Huang <PeiChen.Huang@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-20drm/amd/display: panel inst for monitorsPeichen Huang-18/+29
[WHY] To find proper panel replay panel inst for external monitors. [HOW] Use otg index as panel replay panel inst. Both Replay features use the same logic to get panel inst. Correct the bug that would overwrite panel inst in cmd Reviewed-by: Robin Chen <robin.chen@amd.com> Signed-off-by: Peichen Huang <PeiChen.Huang@amd.com> Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-10drm/amd/display: init code for external panel replayPeichen Huang-18/+44
Prepare for supporting panel replay on external monitors. Reviewed-by: Robin Chen <robin.chen@amd.com> Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Peichen Huang <PeiChen.Huang@amd.com> Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-10drm/amd/display: Always update divider settings for DP tunnelCruise Hung-1/+6
[Why] When transitioning from 640x480 at RBRx1 to HBR3x1, both output pixel mode and pixel rate divider should update. The needs_divider_update flag was only for 8b10b and 128b132b transition. [How] For DP tunneling, always update divider settings. Reviewed-by: Jerry Zuo <jerry.zuo@amd.com> Signed-off-by: Cruise Hung <Cruise.Hung@amd.com> Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-10drm/amd/display: revert "write default Vesa Aux backlight control in dmub"Derek Lai-28/+8
This reverts commit 08f133e932cc. Commit causing backlight darker when the system wakes up from standby mode, and green screen w/ secondary screen only when the system wakes up from standby mode. Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Derek Lai <Derek.Lai@amd.com> Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-10drm/amd/display: PR error HPD_IRQ handlingJack Chang-0/+42
[Why & How] Add error handling for IRQ_HPD in Panel Replay Reviewed-by: Robin Chen <robin.chen@amd.com> Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Jack Chang <jack.chang@amd.com> Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-10drm/amd/display: DPCD for Selective UpdateJack Chang-3/+60
[Why&How] Add flow to read selective update related info from DPCD, and pass the info to DMUB. Reviewed-by: Robin Chen <robin.chen@amd.com> Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Jack Chang <jack.chang@amd.com> Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-10drm/amd/display: Bump the HDMI clock to 340MHzMario Limonciello-1/+3
[Why] DP-HDMI dongles can execeed bandwidth requirements on high resolution monitors. This can lead to pruning the high resolution modes. HDMI 1.3 bumped the clock to 340MHz, but display code never matched it. [How] Set default to (DVI) 165MHz. Once HDMI display is identified update to 340MHz. Reported-by: Dianne Skoll <dianne@skoll.ca> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4780 Reviewed-by: Chris Park <chris.park@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-10drm/amd/display: move panel replay out from edpPeichen Huang-283/+363
[WHY] Panel Replay is not an eDP-specific function. [HOW] Create new Panel Replay source files and move the Panel Replay functions from the eDP files to the new files. Additionally, create a new link_service construct function to assign the related function pointers. Reviewed-by: Robin Chen <robin.chen@amd.com> Signed-off-by: Peichen Huang <PeiChen.Huang@amd.com> Signed-off-by: Matthew Stewart <matthew.stewart2@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/display: Don't repeat DAC load detectionTimur Kristóf-4/+3
The analog link detection code path had already performed the DAC load detection by the time the EDID read is attempted. So there is no need to repeat the DAC load detection, we can know that no display is connected if no EDID is read. Fixes: ac1bb4952267 ("drm/amd/display: Use DAC load detection on analog connectors (v2)") Suggested-by: Alex Hung <alex.hung@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/display: Pass proper DAC encoder ID to VBIOSTimur Kristóf-5/+6
Similarly to the analog_engine field, add a new analog_id field which contains the encoder ID of the analog encoder that corresponds to the link encoder. Previously, the default encoder ID of the link encoder was used, which meant that we passed the wrong ID in case of DVI-I. Fixes: 5834c33fd3f6 ("drm/amd/display: Add concept of analog encoders (v2)") Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/display: Replace log macro for analog display detectionAlex Hung-1/+3
link detection should use LINK_INFO() macro. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/display: Check NULL before calling dac_load_detectionAlex Hung-2/+4
dac_load_detection can be NULL in some scenario, so checking it before calling. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/display: Update dc_connection_dac_load to dc_connection_analog_loadAlex Hung-4/+4
Update to a more accurate name dc_connection_analog_load. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/display: Remove unnecessary divider update flagCruise Hung-5/+1
[Why] When transitioning from 640x480 at RBRx1 to HBR3x1, both output pixel mode and pixel rate divider should update. The needs_divider_update flag was only for 8b10b and 128b132b transition. [How] Remove needs_divider_update flag. Reviewed-by: Michael Strauss <michael.strauss@amd.com> Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Cruise Hung <Cruise.Hung@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/display: Update function name to link_detect_connection_type_analogAlex Hung-3/+3
[WHAT] Update function "link_detect_analog" to a more accurate name "link_detect_connection_type_analog". Suggested-by: Wenjing Liu <wenjing.liu@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/display: sink EDID data null checkRichard Chiang-0/+3
[Why] When sink EDID data pointer is NULL, it will cause an unexpected error. [How] Check data pointer is not NULL first. Reviewed-by: Yihan Zhu <yihan.zhu@amd.com> Signed-off-by: Richard Chiang <Richard.Chiang@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd: Convert DRM_*() to drm_*()Mario Limonciello (AMD)-5/+4
The drm_*() macros include the device which is helpful for debugging issues in multi-GPU systems. Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-01-05drm/amd/display: Fix DPMS log printingMario Limonciello (AMD)-89/+29
[Why] Spaces before newline are not necessary. Inserting newlines in multi-line strings are harder to follow when tracing messages. [How] Drop extra new lines and split multi-line messages into one print per line. Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16drm/amd/display: Don't disable DPCD mst_en if sink connectedPeichen Huang-5/+11
[WHY] User may connect mst dock with multi monitors and do quick unplug and plug in one of the monitor. This operatioin may create CSN from dock to display driver. Then display driver would disable and then enable mst link and also disable/enable DPCD mst_en bit in dock RX. However, when mst_en bit being disabled, if dock has another CSN message to transmit then the message would be removed because of the disabling of mst_en. In this case, the message is missing and it ends up no display in the replugged monitor. [HOW] Don't disable mst_en bit when link still has sink connected. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Peichen Huang <PeiChen.Huang@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16drm/amd/display: Support DRR granularityWeiguang Li-0/+7
[Why&How] Support DRR granularity for coasting Vtotal calculation Reviewed-by: Robin Chen <robin.chen@amd.com> Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Weiguang Li <wei-guang.li@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-16drm/amd/display: Fix 64-bit state pointer passed as 32-bit GPINT response bufferSrinivasan Shanmugam-2/+5
edp_pr_get_state() incorrectly casts a uint64_t * to uint32_t * when calling dc_wake_and_execute_gpint(). The GPINT path writes only 32 bits, leaving the upper 32 bits of the u64 output uninitialized. Replace the cast with a u32 temporary and copy the result into the u64 pointer. Fixes the below: drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_edp_panel_control.c 1448 bool edp_pr_get_state(const struct dc_link *link, uint64_t *state) ^^^^^^^^^^^^^^^ 1449 { ... 1457 do { 1458 // Send gpint command and wait for ack --> 1459 if (!dc_wake_and_execute_gpint(dc->ctx, DMUB_GPINT__GET_REPLAY_STATE, panel_inst, 1460 (uint32_t *)state, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY)) { ^^^^^^^^^^^^^^^^^ The dc_wake_and_execute_gpint() function doesn't take a u64, it takes a u32. It tries to initialize the state to zero at the start but that's not going to work because of the type mismatch. It suggests that callers are allowed to pass uninitialized data to edp_pr_get_state() but at present there are no callers so this is only a bug in the code but doesn't affect runtime. 1461 // Return invalid state when GPINT times out 1462 *state = PR_STATE_INVALID; 1463 } Fixes: 74ce00932e7e ("drm/amd/display: Refactor panel replay set dmub cmd flow") Reported by: Dan Carpenter <dan.carpenter@linaro.org> Cc: Robin Chen <robin.chen@amd.com> Cc: Jack Chang <jack.chang@amd.com> Cc: Leon Huang <Leon.Huang1@amd.com> Cc: Alex Hung <alex.hung@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Roman Li <roman.li@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08drm/amd/display: Correct FIXED_VS Link Rate Toggle ConditionJing Zhou-1/+1
[WHY&HOW] The condition is only perform toggle if FIXED_VS LTTPR reports no IEEE OUI. The literal "\x0,\x0,\x0" contains commas changes the bytes being compared to {0x00,0x2C,0X00}. The correct literal should be "\x00\x00\x00" without commas. Reviewed-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Jing Zhou <Jing.Zhou@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.46.0) at 2026-05-16 22:44:25 +0000