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path: root/drivers/gpu/drm/amd/include/asic_reg
AgeCommit message (Expand)AuthorLines
2019-04-23drm/amd/include: Add HUBPREQ_DEBUG register offsetsLeo Li-0/+8
2019-03-19drm/amd/amdgpu: Add ENGINE_CNTL register to vcn10 headersTom St Denis-0/+7
2019-01-25drm/amdgpu: update THM IP register header to support BACOJim Qu-0/+3
2019-01-25drm/amdgpu: update NBIO v7.4 to support BACOJim Qu-0/+5
2019-01-14drm/amdgpu: update nbio v6.1 register/master to support BACOJim Qu-0/+6
2019-01-14drm/amdgpu: Add NBIO SMN headers v2Kent Russell-0/+165
2018-12-05drm/amd/include: Add mmhub 9.4 reg offsets and shift-maskLeo Li-0/+67
2018-10-12drm/amdgpu/vcn:Add new register offset/mask for VCNJames Zhu-0/+32
2018-10-10drm/amdgpu: add CP_DEBUG register definition for GC9.0Tao Zhou-0/+2
2018-10-09drm/amd/powerplay/vega20: enable fan RPM and pwm settings V2Evan Quan-0/+22
2018-10-09drm/amd/powerplay/vega20: tell the correct gfx voltage V2Evan Quan-0/+6
2018-09-26drm/amdgpu:Add new register offset/mask to support VCN DPG modeJames Zhu-0/+33
2018-09-10drm/amd/include: update the bitfield define for PF_MAX_REGIONShaoyun Liu-2/+2
2018-08-27drm/amdgpu/include: Add mp 11.0 header files. (v2)Feifei Xu-0/+892
2018-08-27drm/amdgpu/include: add thm 11.0.2 headersEvan Quan-0/+123
2018-08-27drm/amdgpu/include: Add sdma0/1 4.2 register headerfiles. (v3)Feifei Xu-0/+8026
2018-08-27drm/amdgpu/include: Add nbio 7.4 header files (v4)Feifei Xu-0/+53063
2018-08-27drm/amdgpu: add system interrupt mask for jrbcBoyuan Zhang-0/+2
2018-08-27drm/amdgpu: add system interrupt register offset headerBoyuan Zhang-0/+2
2018-06-15drm/amdgpu: add more jpeg register offset headersBoyuan Zhang-0/+20
2018-06-13drm/amd/include: Update df 3.6 mask and shift definitionShaoyun Liu-4/+4
2018-05-23drm/amdgpu: add new DF 1.7 register defsAlex Deucher-0/+8
2018-05-18drm/amdgpu: add df 3.6 headersAlex Deucher-0/+107
2018-05-17drm/amd: Add dce-12.1 gpio aux registers (v2)Roman Li-0/+164
2018-04-11drm/amdgpu: add df v1_7 header filesHawking Zhang-0/+107
2018-04-11drm/amdgpu: Add CM_TEST_DEBUG regs for DCNHarry Wentland-3/+24
2018-03-21drm/amd/include: Add ip header files for vega12.Feifei Xu-0/+52499
2018-03-07drm/amd/amdgpu: re-add missing GC 9.1 and SDMA0 4.1 sh_mask header filesTom St Denis-0/+32808
2018-02-19drm/amd/display: Adding missing TMZ sh/mask entries for DCN1 SURFACE_CONTROLHarry Wentland-0/+14
2018-02-19drm/amd/pp: Export registers for read vddc on VI/Vega10Rex Zhu-2/+11
2017-12-13drm/amdgpu: remove some old gc 9.x registersAlex Deucher-80/+0
2017-12-06drm/amd/include:cleanup raven1 vcn header files.Feifei Xu-202/+0
2017-12-06drm/amd/include:cleanup raven1 thm header files.Feifei Xu-0/+0
2017-12-06drm/amd/include:cleanup raven1 nbio header files.Feifei Xu-0/+0
2017-12-06drm/amd/include:cleanup raven1 mp header files.Feifei Xu-0/+0
2017-12-06drm/amd/include:cleanup raven1 mmhub header files.Feifei Xu-1028/+0
2017-12-06drm/amd/include:cleanup raven1 gc header files.Feifei Xu-35196/+0
2017-12-06drm/amd/include:cleanup raven1 dcn header files.Feifei Xu-7988/+0
2017-12-06drm/amd/include:cleanup raven1 sdma header files.Feifei Xu-1658/+0
2017-12-06drm/amd/include:cleanup vega10 header files.Feifei Xu-23874/+0
2017-12-06drm/amd/include:cleanup vega10 osssys header files.Feifei Xu-176/+0
2017-12-06drm/amd/include:cleanup vega10 smuio header files.Feifei Xu-100/+0
2017-12-06drm/amd/include:cleanup vega10 nbif header files.Feifei Xu-1271/+0
2017-12-06drm/amd/include:cleanup vega10 nbio header files.Feifei Xu-0/+0
2017-12-06drm/amd/include:cleanup vega10 mmhub header files.Feifei Xu-0/+0
2017-12-06drm/amd/include:cleanup vega10 gc header files.Feifei Xu-0/+0
2017-12-06drm/amd/include:cleanup vega10 vce header files.Feifei Xu-0/+0
2017-12-06drm/amd/include:cleanup vega10 uvd header files.Feifei Xu-127/+0
2017-12-06drm/amd/include:cleanup vega10 dce header files.Feifei Xu-9868/+0
2017-12-06drm/amd/include: cleanup vega10 umc header files.Feifei Xu-0/+0
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