| Age | Commit message (Collapse) | Author | Lines | |
|---|---|---|---|---|
| 2025-12-08 | drm/amdgpu: Fix SHMEM alignment mode for GFX 12.1.0 | Mukul Joshi | -0/+5 | |
| Alignment mode in SHMEM config register is only a single bit value on GFX 12.1.0 instead of 2 bits in previous asics. Add a new enum and use the correct value of SHMEM alignment mode when programming the SHMEM config register. Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> | ||||
| 2025-12-08 | drm/amdgpu: Add soc v1_0 enum header | Hawking Zhang | -0/+33 | |
| Add soc v1_0 enum header Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> | ||||
