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path: root/drivers/gpu/drm/i915/display/intel_dsb.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2025-09-04drm/i915/dsb: use generic poll_timeout_us() instead of wait_for()Jani Nikula1-2/+8
2025-06-17drm/i915/dsb: Disable the GOSUB interruptVille Syrjälä1-5/+9
2025-06-17drm/i915/dsb: Move the DSB_PMCTRL* reset out of intel_dsb_finish()Ville Syrjälä1-12/+11
2025-06-17drm/i915/dsb: Garbage collect the MMIO DEwake stuffVille Syrjälä1-37/+8
2025-06-17drm/i915/dsb: Introduce intel_dsb_exec_time_us()Ville Syrjälä1-2/+24
2025-06-17drm/i915/dsb: Provide intel_dsb_head() and intel_dsb_size()Ville Syrjälä1-2/+7
2025-06-17drm/i915/dsb: Use intel_dsb_ins_align() in intel_dsb_align_tail()Ville Syrjälä1-0/+2
2025-06-11drm/i915/display: drop i915_reg.h include where possibleJani Nikula1-1/+0
2025-06-09drm/i915: split out display register macros to a separate fileJani Nikula1-0/+1
2025-05-26drm/i915/dsb: Add support for GOSUB interruptChaitanya Kumar Borah1-0/+9
2025-05-26drm/i915/dsb: add intel_dsb_gosub_finish()Chaitanya Kumar Borah1-0/+13
2025-05-26drm/i915/dsb: Implement intel_dsb_gosub()Ville Syrjälä1-0/+73
2025-05-26drm/i915/dsb: Extract intel_dsb_{head,tail}()Ville Syrjälä1-10/+14
2025-05-26drm/i915/dsb: Extract assert_dsb_tail_is_aligned()Ville Syrjälä1-4/+15
2025-05-26drm/i915/dsb: Extract intel_dsb_ins_align()Ville Syrjälä1-2/+14
2025-05-14drm/i915/display: drop unnecessary includes on i915 core headersJani Nikula1-1/+0
2025-04-22drm/i915/display: drop lots of unnecessary #include i915_drv.hJani Nikula1-1/+2
2025-04-09drm/i915/wm: convert skl_watermark.h external interfaces to struct intel_displayJani Nikula1-2/+2
2025-03-21drm/i915/display: convert to display runtime PM interfacesJani Nikula1-8/+9
2025-02-14drm/i915/display: Evade scanline 0 as well if PSR1 or PSR2 is enabledJouni Högander1-0/+12
2025-02-14drm/i915/psr: Remove DSB_SKIP_WAITS_EN chicken bitJouni Högander1-3/+12
2025-02-12drm/i915/dsb: Decode DSB error interruptsVille Syrjälä1-3/+12
2025-02-12drm/i915/dsb: Introduce intel_dsb_poll()Ville Syrjälä1-0/+19
2025-02-12drm/i915/vrr: Account for TRANS_PUSH delayVille Syrjälä1-1/+7
2025-02-12drm/i915/dsb: Move the +1 usec adjustment into dsb_wait_usec()Ville Syrjälä1-2/+3
2025-01-23drm/i915/display: fix typos in i915/display filesNitin Gote1-1/+1
2025-01-15drm/i915/vrr: Introduce intel_vrr_vblank_delay()Ville Syrjälä1-4/+14
2025-01-15drm/i915: Consolidate intel_pre_commit_crtc_state()Ville Syrjälä1-25/+12
2025-01-15drm/i915: Extract intel_mode_vblank_delay()Ville Syrjälä1-2/+1
2025-01-15drm/i915: Introduce intel_vrr_{vmin,vmax}_vtotal()Ville Syrjälä1-1/+1
2024-11-28drm/i915/dsb: Nuke the MMIO->indexed register write logicVille Syrjälä1-44/+14
2024-11-28drm/i915/dsb: Don't use indexed register writes needlesslyVille Syrjälä1-3/+16
2024-10-17Merge drm/drm-next into drm-intel-nextRodrigo Vivi1-4/+0
2024-10-04drm/i915/dsb: Introduce intel_dsb_wait_vblank_delay()Ville Syrjälä1-0/+11
2024-10-04drm/i915/dsb: Introduce intel_dsb_wait_vblanks()Ville Syrjälä1-0/+6
2024-10-04drm/i915/dsb: Introduce intel_dsb_wait_usec()Ville Syrjälä1-0/+6
2024-10-04drm/i915/dsb: Introduce intel_dsb_vblank_evade()Ville Syrjälä1-0/+31
2024-10-04drm/i915/dsb: Enable programmable DSB interruptVille Syrjälä1-2/+27
2024-10-04drm/i915/dsb: Avoid reads of the DSB buffer for indexed register writesVille Syrjälä1-22/+32
2024-09-18drm/xe: Revert "drm/i915: Disable DSB in Xe KMD"Animesh Manna1-4/+0
2024-09-05drm/i915/display: pass display to intel_crtc_for_pipe()Jani Nikula1-1/+1
2024-08-29drm/i915/dsb: Clear DSB_ENABLE_DEWAKE once the DSB is doneVille Syrjälä1-1/+3
2024-08-29drm/i915/dsb: Allow intel_dsb_chain() to use DSB_WAIT_FOR_VBLANKVille Syrjälä1-5/+38
2024-08-29drm/i915/dsb: Introduce intel_dsb_chain()Ville Syrjälä1-0/+42
2024-08-29drm/i915/dsb: Introduce intel_dsb_wait_scanline_{in,out}()Ville Syrjälä1-0/+73
2024-08-29drm/i915/dsb: Precompute DSB_CHICKENVille Syrjälä1-3/+6
2024-08-29drm/i915/dsb: Account for VRR properly in DSB scanline stuffVille Syrjälä1-5/+60
2024-08-29drm/i915/dsb: Fix dewake scanlineVille Syrjälä1-8/+2
2024-08-29drm/i915/dsb: Shuffle code aroundVille Syrjälä1-28/+28
2024-08-29drm/i915/dsb: Convert dewake_scanline to a hw scanline number earlierVille Syrjälä1-9/+12
generated by cgit v1.2.3 (git 2.39.1) at 2026-01-11 22:21:13 +0000