aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/soc/intel_pch.c (follow)
AgeCommit message (Expand)AuthorFilesLines
2025-04-12drm/{i915,xe}: Move intel_pch under displayRodrigo Vivi1-316/+0
2025-02-12drm/i915/pch: Remove unused i915->pch_idJani Nikula1-4/+0
2025-02-12drm/i915/pch: Hide PCH device IDsJani Nikula1-0/+30
2025-02-12drm/i915/pch: Make LPT LP a dedicated PCH typeJani Nikula1-4/+4
2025-01-23drm/i915/soc: fix typos in i915/soc filesNitin Gote1-1/+1
2024-10-02drm/i915/soc: stop using IS_GEN9_LP() and IS_GEN9_BC()Jani Nikula1-1/+4
2024-05-03drm/i915/bmg: BMG should re-use MTL's south display logicMatt Roper1-2/+2
2024-01-03drm/i915/mtl: Add fake PCH for Meteor LakeHaridhar Kalvala1-8/+8
2023-09-21drm/i915/xe2lpd: Add fake PCHGustavo Sousa1-1/+4
2023-09-21drm/i915: Re-order if/else ladder in intel_detect_pch()Lucas De Marchi1-5/+8
2023-08-07drm/i915/jsl: s/JSL/JASPERLAKE for platform/subplatform definesDnyaneshwar Bhadane1-3/+5
2023-08-07drm/i915/bdw: s/BDW/BROADWELL for platform/subplatform definesDnyaneshwar Bhadane1-5/+5
2023-08-07drm/i915/hsw: s/HSW/HASWELL for platform/subplatform definesDnyaneshwar Bhadane1-5/+5
2022-12-13drm/i915: add new "soc" sub-directory and move PCH and DRAM code thereJani Nikula1-0/+279
generated by cgit v1.2.3 (git 2.39.1) at 2025-12-27 17:08:16 +0000