summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/msm
AgeCommit message (Expand)AuthorLines
2025-03-05drm/msm/dpu: change ib values to u32Dmitry Baryshkov-6/+6
2025-03-05drm/msm/dpu: remove duplicate code calculating sum of bandwidthsDmitry Baryshkov-56/+38
2025-03-05drm/msm/dpu: extract bandwidth aggregation functionDmitry Baryshkov-20/+25
2025-03-05drm/msm/dpu: enable CDM_0 for X Elite platformDmitry Baryshkov-0/+1
2025-03-05drm/msm/dpu: enable CDM_0 for SC8280XP platformDmitry Baryshkov-0/+1
2025-03-05drm/msm/dpu: enable CDM_0 for DPUs 1.x - 4.xDmitry Baryshkov-0/+16
2025-03-05drm/msm/dpu: enable CDM_0 for DPUs 5.x+Dmitry Baryshkov-0/+11
2025-03-05drm/msm/dpu: rename CDM block definitionDmitry Baryshkov-4/+4
2025-03-05drm/msm/dpu: fix error pointer dereference in msm_kms_init_aspace()Dan Carpenter-0/+1
2025-03-05drm/msm/hdmi: use DRM HDMI Audio frameworkDmitry Baryshkov-111/+71
2025-03-05drm/msm/hdmi: also send the SPD and HDMI Vendor Specific InfoFramesDmitry Baryshkov-0/+93
2025-03-05drm/msm/hdmi: update HDMI_GEN_PKT_CTRL_GENERIC0_UPDATE definitionDmitry Baryshkov-1/+1
2025-03-05drm/msm/hdmi: get rid of hdmi_modeDmitry Baryshkov-17/+4
2025-03-05drm/msm/hdmi: make use of the drm_connector_hdmi frameworkDmitry Baryshkov-147/+162
2025-03-05drm/msm/hdmi: program HDMI timings during atomic_pre_enableDmitry Baryshkov-8/+15
2025-03-05drm/msm/hdmi: switch to atomic bridge callbacksDmitry Baryshkov-4/+9
2025-03-05drm/msm/dpu: Set possible clones for all encodersJessica Zhang-2/+39
2025-03-05drm/msm/dpu: Reorder encoder kickoff for CWBJessica Zhang-14/+60
2025-03-05drm/msm/dpu: Skip trigger flush and start for CWBJessica Zhang-0/+18
2025-03-05drm/msm/dpu: Start frame done timer after encoder kickoffJessica Zhang-10/+24
2025-03-05drm/msm/dpu: Adjust writeback phys encoder setup for CWBJessica Zhang-3/+8
2025-03-05drm/msm/dpu: Support CWB in dpu_hw_ctlJessica Zhang-2/+57
2025-03-05drm/msm/dpu: Configure CWB in writeback encoderJessica Zhang-3/+83
2025-03-05drm/msm/dpu: Reserve resources for CWBJessica Zhang-4/+120
2025-03-05drm/msm/dpu: Fail atomic_check if multiple outputs request CDM blockJessica Zhang-7/+14
2025-03-05drm/msm/dpu: Require modeset if clone mode status changesJessica Zhang-8/+17
2025-03-05drm/msm/dpu: Add CWB to msm_display_topologyJessica Zhang-3/+24
2025-03-05drm/msm/dpu: switch RM to use crtc_id rather than enc_id for allocationDmitry Baryshkov-126/+110
2025-03-05drm/msm/dpu: move resource allocation to CRTCDmitry Baryshkov-134/+145
2025-03-05drm/msm/dpu: fill CRTC resources in dpu_crtc.cDmitry Baryshkov-37/+63
2025-03-05drm/msm/dpu: don't set crtc_state->mode_changed from atomic_check()Dmitry Baryshkov-5/+75
2025-02-27drm/msm/a6xx: Add support for Adreno 623Jie Zhang-1/+43
2025-02-27drm/msm/a6xx: Fix gpucc register block for A621Jie Zhang-2/+19
2025-02-27drm/msm/a6xx: Split out gpucc register blockJie Zhang-3/+10
2025-02-27drm/msm/gem: Fix error code msm_parse_deps()Dan Carpenter-1/+1
2025-02-27drm/msm: Extend gpu devcore dumps with pgtbl infoRob Clark-1/+51
2025-02-27drm/msm: Expose DRIVER_SYNCOBJ_TIMELINERob Clark-0/+1
2025-02-27drm/msm/a6xx: Fix stale rpmh votes from GPUAkhil P Oommen-33/+39
2025-02-26drm/msm/dpu: rate limit snapshot capture for mmu faultsAbhinav Kumar-1/+9
2025-02-26drm/msm: switch msm_kms to use msm_iommu_disp_new()Abhinav Kumar-1/+1
2025-02-26drm/msm/iommu: introduce msm_iommu_disp_new() for msm_kmsAbhinav Kumar-0/+27
2025-02-26drm/msm/iommu: rename msm_fault_handler to msm_gpu_fault_handlerAbhinav Kumar-3/+3
2025-02-26drm/msm: register a fault handler for display mmu faultsAbhinav Kumar-0/+13
2025-02-26drm/msm/dsi/phy: Define PHY_CMN_CLK_CFG[01] bitfields and simplify savingKrzysztof Kozlowski-4/+6
2025-02-26drm/msm/dsi/phy: Use dsi_pll_cmn_clk_cfg1_update() when registering PLLKrzysztof Kozlowski-5/+4
2025-02-26drm/msm/dsi: Add check for devm_kstrdup()Haoxiang Li-1/+8
2025-02-26drm/msm/dsi: Allow values of 10 and 12 for bits per componentEugene Lepshy-3/+15
2025-02-26drm/msm/dpu: Remove arbitrary limit of 1 interface in DSC topologyMarijn Suijten-3/+4
2025-02-26drm/msm/dsi: Set PHY usescase (and mode) before registering DSI hostMarijn Suijten-11/+21
2025-02-26drm/msm/dsi: Use existing per-interface slice count in DSC timingMarijn Suijten-15/+4
generated by cgit v1.2.3 (git 2.46.0) at 2026-03-19 19:27:05 +0000