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path: root/drivers/gpu
AgeCommit message (Expand)AuthorLines
2010-09-21drm/i915/lvds: Unlock the PP register when panel-fittingChris Wilson-2/+6
2010-09-21drm/i915: Use the correct DPB GMBUS port for GPIOEChris Wilson-2/+2
2010-09-21drm/i915: Drop crtc->fb pin on disable.Chris Wilson-0/+15
2010-09-21drm/i915: Disable output polling across suspend & resumeChris Wilson-3/+10
2010-09-21intel-gtt: clean up gtt size reportingDaniel Vetter-1/+0
2010-09-21drm/i915: Track pinned objectsChris Wilson-14/+26
2010-09-21drm/i915: Drain any pending flips on the fb prior to unpinningChris Wilson-20/+26
2010-09-21drm/i915: Merge ring flushing and lazy requestsChris Wilson-32/+24
2010-09-21drm/i915: Track gpu fence usageChris Wilson-2/+10
2010-09-21drm/i915/ringbuffer: whitespace cleanupChris Wilson-65/+68
2010-09-21drm/i915: drop alignment ringbuffer parameterDaniel Vetter-5/+1
2010-09-21drm/i915: don't explicitly initialize ringbuffer members to zeroDaniel Vetter-33/+0
2010-09-21drm/i915: use new macros to access the ring ctl registerDaniel Vetter-17/+7
2010-09-21drm/i915: use new macros to access the ring head registerDaniel Vetter-40/+13
2010-09-21drm/i915: use new macros to access the ring start registerDaniel Vetter-8/+6
2010-09-21drm/i915: use new macros to access the ring tail registerDaniel Vetter-50/+22
2010-09-21drm/i915: add relative ring register macrosDaniel Vetter-0/+12
2010-09-21drm/i915: kill duplicated/unneeded register definesDaniel Vetter-18/+0
2010-09-21drm/i915: Use ring->flush() instead of MI_FLUSHChris Wilson-17/+20
2010-09-21drm/i915/ringbuffer: Mark the initialisation structs as constant.Chris Wilson-3/+3
2010-09-21drm/i915: add a new BSD ring buffer for SandybridgeXiang, Haihao-8/+159
2010-09-21drm/i915/ringbuffer: Implement advance using set_tailChris Wilson-17/+1
2010-09-21drm/i915: add set_tail hook in struct intel_ring_bufferXiang, Haihao-5/+19
2010-09-21drm/i915: do not export the instances of struct intel_ring_bufferXiang, Haihao-16/+31
2010-09-21drm/i915: fix HAS_BSD with a device info flagXiang, Haihao-1/+6
2010-09-21drm/i915: Clean up bo lists on all hung gpusChris Wilson-19/+16
2010-09-21drm/i915: Clear GPU read domains on resetChris Wilson-0/+19
2010-09-21drm/i915: Clear flushing lists on GPU resetChris Wilson-0/+23
2010-09-21drm/i915: Only emit a flush request on the active ring.Chris Wilson-22/+51
2010-09-21drm/i915: Inline i915_gem_ring_retire_request()Chris Wilson-53/+38
2010-09-21drm/i915/debug: Dump BSD ring buffers to debugfsChris Wilson-6/+12
2010-09-21drm/i915: After a reset perform a forced modesetChris Wilson-7/+10
2010-09-21drm/i915: Add support for GPU soft reset on Ironlake.Kenneth Graunke-7/+27
2010-09-21drm/i915: Rename graphics reset registers.Kenneth Graunke-8/+10
2010-09-21drm/i915: Actually set the reset bit in i965_reset.Kenneth Graunke-16/+15
2010-09-21drm/i915: INTEL_INFO->gen supercedes i8xx, i9xx, i965gChris Wilson-201/+197
2010-09-21drm/i915: Cache LVDS EDIDChris Wilson-11/+8
2010-09-21Merge branch 'drm-intel-fixes' into HEADChris Wilson-268/+507
2010-09-21Merge remote branch 'linus' into drm-intel-fixesChris Wilson-66/+188
2010-09-20drm/i915: Hold a reference to the object whilst unbinding the eviction listChris Wilson-2/+7
2010-09-18drm/i915: use GMBUS to manage i2c linksChris Wilson-419/+441
2010-09-17drm/i915,agp/intel: Add second set of PCI-IDs for B43Chris Wilson-0/+1
2010-09-17drm/i915: Fix Sandybridge fence registersChris Wilson-22/+51
2010-09-17drm/i915/crt: Downgrade warnings for hotplug failuresChris Wilson-2/+2
2010-09-15drm/i915: call drm_encoder_init firstChris Wilson-12/+18
2010-09-15drm/i915/sdvo: Mark the status as unknown if attached with EDIDChris Wilson-1/+1
2010-09-15drm/i915/sdvo: Only create the analog encoder as requiredChris Wilson-28/+41
2010-09-15drm/radeon/kms: only warn on mipmap size checks in r600 cs checker (v2)Alex Deucher-3/+2
2010-09-14drm/i915/sdvo: Propagate i2c error from switching DDC control bus.Chris Wilson-9/+18
2010-09-14drm/i915/sdvo: Tidy intel_sdvo_hdmi_sink_detectChris Wilson-31/+24
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