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path: root/drivers/gpu
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2024-06-05drm/i915: Extract intel_pipe_crc_regs.hVille Syrjälä-81/+94
2024-06-05drm/i915/dsb: Use intel_color_uses_dsb()Ville Syrjälä-1/+3
2024-06-05drm/i915/dsb: Pass DSB engine ID to intel_dsb_prepare()Ville Syrjälä-3/+6
2024-06-05drm/i915/dsb: Move DSB ID definition to the headerVille Syrjälä-8/+8
2024-06-05drm/i915/dsb: Polish the DSB ID enumVille Syrjälä-11/+11
2024-06-05drm/v3d: Fix perfmon build error/warningTvrtko Ursulin-195/+205
2024-06-05drm/xe: Use missing lock in relay_needs_workerNirmoy Das-1/+8
2024-06-04drm/xe/xe2lpg: Add permanent wa_14020756599Tejas Upadhyay-0/+4
2024-06-04drm/xe/xe2lpm: Add permanent Wa_14020756599Tejas Upadhyay-0/+27
2024-06-04drm/i915: Fix assert on pending async-put power domain work when it requeues ...Imre Deak-6/+6
2024-06-04drm/bridge: analogix_dp: don't adjust further when clock recovery succeededLucas Stach-29/+26
2024-06-04drm/bridge: analogix_dp: simplify analogix_dp_{set/get}_lane_link_training he...Wyon Bi-207/+26
2024-06-04drm/bridge: analogix_dp: properly handle zero sized AUX transactionsLucas Stach-4/+1
2024-06-04drm/xe/pf: Update the LMTT when freeing VF GT configMichal Wajdeczko-0/+1
2024-06-03drm/panel: sitronix-st7789v: Add check for of_drm_get_panel_orientationChen Ni-1/+3
2024-06-03drm: panel: nv3052c: Add WL-355608-A8 panelRyan Walklin-0/+225
2024-06-03drm/i915/psr: Add Early Transport into psr debugfs interfaceJouni Högander-8/+27
2024-06-03drm/i915/psr: Allow setting I915_PSR_DEBUG_SU_REGION_ET_DISABLE via debugfsJouni Högander-3/+10
2024-06-03drm/i915/display: Selective fetch Y position on Region Early TransportJouni Högander-1/+5
2024-06-03drm/i915/psr: Use enable boolean from intel_crtc_state for Early TransportJouni Högander-1/+1
2024-06-03drm/i915/psr: Get Early Transport status in intel_psr_pipe_get_configJouni Högander-0/+2
2024-06-03drm/i915/psr: Add Early Transport status boolean into intel_psrJouni Högander-1/+4
2024-05-31drm/xe: Add kernel-doc to some xe_lrc interfacesNiranjana Vishwanathapura-0/+31
2024-05-31drm/xe: Fix NULL ptr dereference in devcoredumpMatthew Brost-1/+1
2024-05-31drm: move i915_hdcp_interface.h under include/drm/intelJani Nikula-4/+4
2024-05-31drm: move xe_pciids.h under include/drm/intelJani Nikula-1/+1
2024-05-31drm: move i915_pciids.h under include/drm/intelJani Nikula-3/+3
2024-05-31drm: move i915_pxp_tee_interface.h under include/drm/intelJani Nikula-1/+1
2024-05-31drm: move i915_drm.h under include/drm/intelJani Nikula-6/+6
2024-05-31drm: move intel_lpe_audio.h under include/drm/intelJani Nikula-2/+2
2024-05-31drm: move i915_component.h under include/drm/intelJani Nikula-5/+5
2024-05-31drm: move i915_gsc_proxy_mei_interface.h under include/drm/intelJani Nikula-2/+2
2024-05-31drm: move intel-gtt.h under include/drm/intelJani Nikula-3/+3
2024-05-31drm/i915: reduce includes in intel_clock_gating.cJani Nikula-4/+0
2024-05-31drm/i915: drop unnecessary i915_reg.h includesJani Nikula-7/+0
2024-05-31drm/xe/pf: Update the LMTT when freeing VF GT configMichal Wajdeczko-0/+1
2024-05-31drm/i915: remove intermediate _PCH_DP_* macrosJani Nikula-8/+3
2024-05-31drm/i915: move PCH DP AUX CH regs to intel_dp_aux_regs.hJani Nikula-7/+8
2024-05-31drm/i915: rearrange DP AUX register macrosJani Nikula-4/+6
2024-05-31drm/i915: remove unused DP AUX CH register macrosJani Nikula-14/+0
2024-05-31drm/i915/gvt: use proper macros for DP AUX CH CTL registersJani Nikula-23/+20
2024-05-31drm/komeda: remove unused struct 'gamma_curve_segment'Dr. David Alan Gilbert-5/+0
2024-05-31drm/i915: Switch intel_usecs_to_scanlines() to 64bit mathsVille Syrjälä-2/+2
2024-05-31drm/i915: Move intel_crtc_scanline_offset()Ville Syrjälä-38/+38
2024-05-31drm/i915: Simplify scanline_offset handling for gen2Ville Syrjälä-5/+3
2024-05-31drm/i915: Extract intel_mode_vtotal()Ville Syrjälä-23/+18
2024-05-31drm/i915: Extract intel_mode_vblank_end()Ville Syrjälä-4/+13
2024-05-31drm/i915: Reuse intel_mode_vblank_start()Ville Syrjälä-13/+9
2024-05-31drm/i915: Plumb the full atomic state into skl_ddb_add_affected_planes()Ville Syrjälä-10/+9
2024-05-31drm/i915: Plumb the full atomic state into icl_check_nv12_planes()Ville Syrjälä-5/+6
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