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path: root/drivers/gpu
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2025-10-25gpu: nova-core: replace wait_on with kernel equivalentsAlexandre Courbot-91/+51
2025-10-25gpu: nova-core: remove unnecessary need_riscv, bar parametersJohn Hubbard-23/+2
2025-10-25gpu: nova-core: remove an unnecessary register read: HWCFG1John Hubbard-5/+0
2025-10-25gpu: nova-core: Ada: basic GPU identificationJohn Hubbard-1/+2
2025-10-25gpu: nova-core: regs: rename .alter() --> .update()John Hubbard-18/+18
2025-10-24drm/xe/configfs: Drop MAX_GT_TYPE_CHARS constantMatt Roper-2/+1
2025-10-25drm/i915/vrr: Check HAS_VRR() first in intel_vrr_is_capable()Ville Syrjälä-2/+4
2025-10-25drm/i915/vrr: Update the intel_vrr_extra_vblank_delay() commentVille Syrjälä-4/+2
2025-10-25drm/i915/vrr: Nuke intel_vrr_vmin_flipline()Ville Syrjälä-7/+2
2025-10-25drm/i915/vrr: Nuke intel_vrr_vblank_exit_length()Ville Syrjälä-6/+2
2025-10-25drm/i915/vrr: s/crtc_state/old_crtc_state/ in intel_vrr_transcoder_disable()Ville Syrjälä-4/+4
2025-10-25drm/i915/vrr: Move HAS_VRR() check into intel_vrr_set_transcoder_timings()Ville Syrjälä-2/+4
2025-10-25drm/i915/vrr: Remove redundant HAS_VRR() checksVille Syrjälä-6/+0
2025-10-25drm/i915/vrr: Always write TRANS_VRR_CTL in intel_vrr_set_transcoder_timings(...Ville Syrjälä-9/+3
2025-10-25drm/i915/vrr: Disable VRR TG in intel_vrr_transcoder_disable() only on always...Ville Syrjälä-1/+2
2025-10-25drm/i915/vrr: Extract intel_vrr_tg_enable()Ville Syrjälä-19/+25
2025-10-25drm/i915/vrr: Extract intel_vrr_tg_disable()Ville Syrjälä-23/+19
2025-10-25drm/i915/vrr: Use trans_vrr_ctl() in intel_vrr_transcoder_disable()Ville Syrjälä-1/+2
2025-10-25drm/i915/vrr: Move EMP_AS_SDP_TL write into intel_vrr_set_transcoder_timings()Ville Syrjälä-23/+12
2025-10-25drm/i915/vrr: Avoid redundant TRANS_PUSH write in intel_vrr_enable()Ville Syrjälä-3/+3
2025-10-25drm/i915/vrr: Extract intel_vrr_set_vrr_timings()Ville Syrjälä-4/+12
2025-10-25drm/i915/vrr: Move compute_fixed_rr_timings()Ville Syrjälä-9/+9
2025-10-25drm/i195/vrr: Move crtc_state->vrr.{vmin,vmax} update into intel_vrr_compute_...Ville Syrjälä-7/+7
2025-10-25drm/i915/vrr: Reorganize intel_vrr_compute_cmrr_timings() a bitVille Syrjälä-1/+2
2025-10-25drm/i915/vrr: Compute fixed refresh rate timings the same way as CMRR timingsVille Syrjälä-5/+3
2025-10-24drm/i915: Remove the "vblank delay" state dumpVille Syrjälä-3/+1
2025-10-24drm/i915/lrr: Include SCL in lrr_params_changed()Ville Syrjälä-5/+8
2025-10-24drm/i915/vrr: Fix intel_vrr_always_use_vrr_tg()==true on TGLVille Syrjälä-0/+6
2025-10-24drm/gud: rearrange gud_probe() to prepare for function splittingRuben Wauters-21/+24
2025-10-24Merge drm/drm-next into drm-misc-nextThomas Zimmermann-2295/+4979
2025-10-24Merge tag 'drm-xe-fixes-2025-10-23' of https://gitlab.freedesktop.org/drm/xe/...Simona Vetter-69/+49
2025-10-24Merge tag 'drm-intel-fixes-2025-10-23' of https://gitlab.freedesktop.org/drm/...Simona Vetter-12/+13
2025-10-24Merge tag 'drm-misc-fixes-2025-10-23' of https://gitlab.freedesktop.org/drm/m...Simona Vetter-10/+62
2025-10-24Merge tag 'drm-misc-next-2025-10-21' of https://gitlab.freedesktop.org/drm/mi...Simona Vetter-781/+1552
2025-10-24drm/{i915,xe}/fbdev: add intel_fbdev_fb_pitch_align()Jani Nikula-1/+20
2025-10-24drm/client: Do not free client memory by defaultThomas Zimmermann-4/+5
2025-10-24drm/log: Add free callbackThomas Zimmermann-3/+11
2025-10-24drm/log: Do not hold lock across drm_client_release()Thomas Zimmermann-1/+1
2025-10-24drm/client: Add client free callback to unprepare fb_helperThomas Zimmermann-27/+19
2025-10-23drm/xe: Check return value of GGTT workqueue allocationMatthew Brost-0/+3
2025-10-23drm/xe/xe3p_xpc: Add MCR steering for NODE and L3BANK rangesMatt Roper-2/+34
2025-10-23drm/xe/xe3p_xpc: Treat all PSMI MCR ranges as "INSTANCE0"Matt Roper-22/+1
2025-10-23drm/xe: Use SVM range helpers in PT layerMatthew Brost-14/+14
2025-10-23drm/xe/cri: Setup MOCS tableMatt Roper-0/+26
2025-10-23drm/xe/cri: Add CRI platform definitionBalasubramani Vivekanandan-0/+16
2025-10-23drm/xe/migrate: skip bounce buffer path on xe2Matthew Auld-11/+32
2025-10-23drm/xe/migrate: support MEM_COPY instructionMatthew Auld-3/+72
2025-10-23drm/xe/migrate: trim batch buffer sizingMatthew Auld-3/+3
2025-10-23drm/xe/migrate: fix batch buffer sizingMatthew Auld-1/+1
2025-10-23drm/xe/migrate: fix chunk handling for 2M page emitMatthew Auld-1/+3
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