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path: root/drivers/gpu
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2025-10-16drm/i915/display: Introduce dp/psr_compute_config_late()Ankit Nautiyal-9/+38
2025-10-16drm/i915/psr: Introduce helper intel_psr_set_non_psr_pipes()Ankit Nautiyal-20/+29
2025-10-16drm/i915/psr: Consider SCL lines when validating vblank for wake latencyAnkit Nautiyal-41/+61
2025-10-16drm/i915/vblank: Add helper to get correct vblank lengthAnkit Nautiyal-1/+14
2025-10-16drm/i915/vrr: s/intel_vrr_compute_config_late/intel_vrr_compute_guardbandAnkit Nautiyal-4/+4
2025-10-16drm/i915/display: Move intel_dpll_crtc_compute_clock earlyAnkit Nautiyal-2/+2
2025-10-16drm/i915/vrr: Use crtc_vsync_start/end for computing vrr.vsync_start/endAnkit Nautiyal-2/+2
2025-10-16drm/sched: Fix potential double free in drm_sched_job_add_resv_dependenciesTvrtko Ursulin-6/+7
2025-10-16drm/i915/panic: fix panic structure allocation memory leakJani Nikula-12/+13
2025-10-16drm/i915/display: Add missing clock to C10 PHY state compute/HW readoutImre Deak-0/+7
2025-10-16drm/i915/display: Fix PHY_C20_VDR_HDMI_RATE programmingImre Deak-3/+6
2025-10-16drm/i915/display: Fix PHY_C20_VDR_CUSTOM_SERDES_RATE programmingImre Deak-11/+14
2025-10-16drm/i915/display: Sanitize PHY_C20_VDR_CUSTOM_SERDES_RATE/IS_HDMI_FRL flag macroImre Deak-2/+3
2025-10-16drm/i915/display: Sanitize PHY_C20_VDR_CUSTOM_SERDES_RATE/CONTEXT_TOGGLE flag...Imre Deak-3/+5
2025-10-16drm/i915/display: Sanitize PHY_C20_VDR_CUSTOM_SERDES_RATE/IS_DP flag macroImre Deak-2/+3
2025-10-16drm/i915/display: Sanitize PHY_C20_VDR_CUSTOM_SERDES_RATE/DP_RATE field macrosImre Deak-5/+5
2025-10-15drm/xe/evict: drop bogus assertMatthew Auld-8/+0
2025-10-15drm/xe/migrate: don't misalign current bytesMatthew Auld-1/+3
2025-10-15drm/xe/kunit: Fix kerneldoc for parameterized testsMatt Roper-0/+5
2025-10-15drm/xe/svm: Ensure data will be migrated to system if indicated by madvise.Thomas Hellström-1/+3
2025-10-16drm/imx: dc: Sort bits and bitfields in descending orderMarek Vasut-27/+27
2025-10-16gpu: nova-core: vbios: Rework BiosImage to be simplerJoel Fernandes-132/+94
2025-10-16gpu: nova-core: gsp: do not unwrap() SGEntryDanilo Krummrich-3/+4
2025-10-16gpu: nova-core: gsp: remove useless conversionDanilo Krummrich-2/+1
2025-10-15drm/rockchip: dw_hdmi_qp: Provide ref clock rate in dw_hdmi_qp_plat_dataCristian Ciocaltea-1/+10
2025-10-15drm/rockchip: dw_hdmi_qp: Provide CEC IRQ in dw_hdmi_qp_plat_dataCristian Ciocaltea-0/+4
2025-10-15drm/rockchip: dw_hdmi_qp: Improve error handling with dev_err_probe()Cristian Ciocaltea-38/+24
2025-10-15drm/bridge: dw-hdmi-qp: Fixup timer base setupCristian Ciocaltea-3/+9
2025-10-15drm/bridge: dw-hdmi-qp: Add CEC supportCristian Ciocaltea-0/+234
2025-10-15drm/xe/evict: drop bogus assertMatthew Auld-8/+0
2025-10-15drm/xe/migrate: don't misalign current bytesMatthew Auld-1/+3
2025-10-15drm/i915/psr: Deactivate PSR only on LNL and when selective fetch enabledJouni Högander-2/+10
2025-10-15drm/i915/fbc: update the impacted platforms in wa_22014263786Vinod Govindapillai-3/+9
2025-10-15drm/qxl: Use vblank timerThomas Zimmermann-0/+29
2025-10-15drm/cirrus-qemu: Use vblank timerThomas Zimmermann-0/+11
2025-10-15drm/bochs: Use vblank timerThomas Zimmermann-0/+10
2025-10-15drm/ast: Store HSync adjustment in device quirksThomas Zimmermann-2/+8
2025-10-15drm/ast: Store precatch settings in struct ast_device_quirksThomas Zimmermann-9/+16
2025-10-15drm/ast: Store CRTC memory request threshold in device quirksThomas Zimmermann-14/+24
2025-10-15drm/ast: Support device quirksThomas Zimmermann-9/+38
2025-10-15drm/ast: Store DRAM clock table in struct ast_deviceThomas Zimmermann-6/+17
2025-10-15drm/i915: drop unused non-i915 IS_<PLATFORM> macrosJani Nikula-10/+0
2025-10-15drm/ast: Blank with VGACR17 sync enable, always clear VGACRB6 sync offThomas Zimmermann-8/+11
2025-10-14drm/xe/sriov: Disable SR-IOV if primary GT is disabled via configfsMatt Roper-1/+2
2025-10-14drm/xe/configfs: Add attribute to disable GT typesMatt Roper-0/+170
2025-10-14drm/xe: Break GT setup out of xe_info_init()Matt Roper-32/+52
2025-10-14drm/xe: Don't check BIOS-disabled FlatCCS if primary GT is disabledMatt Roper-0/+2
2025-10-14drm/xe: Check that GT is not NULL before testing Wa_16023588340Matt Roper-1/+2
2025-10-14drm/xe: Correct lineage for Wa_22014953428 and only check with valid GTMatt Roper-2/+3
2025-10-14drm/xe: Bypass Wa_14018094691 when primary GT is disabledMatt Roper-2/+2
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